arm/mm/proc-arm926.S

52 	mrc	p15, 0, r0, c1, c0, 0		@ ctrl register
55 	mcr	p15, 0, r0, c1, c0, 0		@ disable caches
73 	mcr	p15, 0, ip, c7, c10, 4		@ drain WB
77 	mrc	p15, 0, ip, c1, c0, 0		@ ctrl register
80 	mcr	p15, 0, ip, c1, c0, 0		@ ctrl register
93 	mrc	p15, 0, r1, c1, c0, 0		@ Read control register
94 	mcr	p15, 0, r0, c7, c10, 4		@ Drain write buffer
99 	mcr	p15, 0, r2, c1, c0, 0		@ Disable I cache
100 	mcr	p15, 0, r0, c7, c0, 4		@ Wait for interrupt
101 	mcr	p15, 0, r1, c1, c0, 0		@ Restore ICache enable
142 	mcrne	p15, 0, ip, c7, c10, 4		@ drain WB
180 	mcrne	p15, 0, ip, c7, c10, 4		@ drain WB
217 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB
239 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB
268 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB
289 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB
311 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB
346 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB
372 	mcr	p15, 0, ip, c7, c10, 4		@ drain WB
373 	mcr	p15, 0, r0, c2, c0, 0		@ load page table pointer
392 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB
399 .equ	cpu_arm926_suspend_size, 4 * 3
403 	mrc	p15, 0, r4, c13, c0, 0	@ PID
404 	mrc	p15, 0, r5, c3, c0, 0	@ Domain ID
405 	mrc	p15, 0, r6, c1, c0, 0	@ Control register
415 	mcr	p15, 0, r4, c13, c0, 0	@ PID
416 	mcr	p15, 0, r5, c3, c0, 0	@ Domain ID
417 	mcr	p15, 0, r1, c2, c0, 0	@ TTB address
427 	mcr	p15, 0, r0, c7, c10, 4		@ drain write buffer on v4
434 	mov	r0, #4				@ disable write-back on caches explicitly
435 	mcr	p15, 7, r0, c15, c0, 0
440 	mrc	p15, 0, r0, c1, c0		@ get control register v4