1 // SPDX-License-Identifier: GPL-2.0-or-later
3  * arch/arm/mach-at91/pm.c
35  * struct at91_pm_bu - AT91 power management backup unit data structure
52  * struct at91_pm_sfrbu_regs - registers mapping for SFRBU
65  * enum at91_pm_eth_clk - Ethernet clock indexes
77  * enum at91_pm_eth - Ethernet controller indexes
89  * struct at91_pm_quirk_eth - AT91 PM Ethernet quirks
107  * struct at91_pm_quirks - AT91 PM quirks
115  * struct at91_soc_pm - AT91 SoC power management data structure
137  * enum at91_pm_iomaps - IOs that needs to be mapped for different PM modes
160 	{ AT91_PM_ULP0_FAST,    "ulp0-fast" },
163 	{ -1, NULL },
203 	{ .compatible = "atmel,sama5d2-gem",		.data = &ws_info[0] },
204 	{ .compatible = "atmel,sama5d2-rtc",		.data = &ws_info[1] },
205 	{ .compatible = "atmel,sama5d3-udc",		.data = &ws_info[2] },
206 	{ .compatible = "atmel,at91rm9200-ohci",	.data = &ws_info[2] },
207 	{ .compatible = "usb-ohci",			.data = &ws_info[2] },
208 	{ .compatible = "atmel,at91sam9g45-ehci",	.data = &ws_info[2] },
209 	{ .compatible = "usb-ehci",			.data = &ws_info[2] },
210 	{ .compatible = "atmel,sama5d2-sdhci",		.data = &ws_info[3] },
215 	{ .compatible = "microchip,sam9x60-rtc",	.data = &ws_info[1] },
216 	{ .compatible = "atmel,at91rm9200-ohci",	.data = &ws_info[2] },
217 	{ .compatible = "usb-ohci",			.data = &ws_info[2] },
218 	{ .compatible = "atmel,at91sam9g45-ehci",	.data = &ws_info[2] },
219 	{ .compatible = "usb-ehci",			.data = &ws_info[2] },
220 	{ .compatible = "microchip,sam9x60-rtt",	.data = &ws_info[4] },
221 	{ .compatible = "cdns,sam9x60-macb",		.data = &ws_info[5] },
226 	{ .compatible = "microchip,sama7d65-rtc",	.data = &ws_info[1] },
227 	{ .compatible = "microchip,sama7g5-rtc",	.data = &ws_info[1] },
228 	{ .compatible = "microchip,sama7g5-ohci",	.data = &ws_info[2] },
229 	{ .compatible = "usb-ohci",			.data = &ws_info[2] },
230 	{ .compatible = "atmel,at91sam9g45-ehci",	.data = &ws_info[2] },
231 	{ .compatible = "usb-ehci",			.data = &ws_info[2] },
232 	{ .compatible = "microchip,sama7d65-sdhci",	.data = &ws_info[3] },
233 	{ .compatible = "microchip,sama7g5-sdhci",	.data = &ws_info[3] },
234 	{ .compatible = "microchip,sama7d65-rtt",	.data = &ws_info[4] },
235 	{ .compatible = "microchip,sama7g5-rtt",	.data = &ws_info[4] },
240 	{ .compatible = "microchip,sam9x7-rtc",		.data = &ws_info[1] },
241 	{ .compatible = "microchip,sam9x7-rtt",		.data = &ws_info[4] },
242 	{ .compatible = "microchip,sam9x7-gem",		.data = &ws_info[5] },
258 		return -EPERM;  in at91_pm_config_ws()
277 		if (device_may_wakeup(&pdev->dev)) {  in at91_pm_config_ws()
278 			wsi = match->data;  in at91_pm_config_ws()
281 			if (wsi->shdwc_mr_bit && !(val & wsi->shdwc_mr_bit))  in at91_pm_config_ws()
284 			mode |= wsi->pmc_fsmr_bit;  in at91_pm_config_ws()
285 			if (wsi->set_polarity)  in at91_pm_config_ws()
286 				polarity |= wsi->pmc_fsmr_bit;  in at91_pm_config_ws()
290 		put_device(&pdev->dev);  in at91_pm_config_ws()
300 	return mode ? 0 : -EPERM;  in at91_pm_config_ws()
336 	if (!eth->np)  in at91_pm_eth_quirk_is_valid()
340 	if (!(eth->modes & BIT(soc_pm.data.mode)))  in at91_pm_eth_quirk_is_valid()
343 	if (!eth->dev) {  in at91_pm_eth_quirk_is_valid()
345 		pdev = of_find_device_by_node(eth->np);  in at91_pm_eth_quirk_is_valid()
348 		/* put_device(eth->dev) is called at the end of suspend. */  in at91_pm_eth_quirk_is_valid()
349 		eth->dev = &pdev->dev;  in at91_pm_eth_quirk_is_valid()
353 	if (!device_may_wakeup(eth->dev))  in at91_pm_eth_quirk_is_valid()
386 		if (suspend && eth->dns_modes & BIT(soc_pm.data.mode)) {  in at91_pm_config_quirks()
392 				if (ws->dev == eth->dev)  in at91_pm_config_quirks()
407 				ret = -EPERM;  in at91_pm_config_quirks()
408 				put_device(eth->dev);  in at91_pm_config_quirks()
409 				eth->dev = NULL;  in at91_pm_config_quirks()
411 				i--;  in at91_pm_config_quirks()
417 			clk_bulk_disable_unprepare(AT91_PM_ETH_MAX_CLK, eth->clks);  in at91_pm_config_quirks()
420 						      eth->clks);  in at91_pm_config_quirks()
424 			 * Release the reference to eth->dev taken in  in at91_pm_config_quirks()
427 			put_device(eth->dev);  in at91_pm_config_quirks()
428 			eth->dev = NULL;  in at91_pm_config_quirks()
440 	for (j = i; j >= 0; j--) {  in at91_pm_config_quirks()
446 			tmp = clk_bulk_prepare_enable(AT91_PM_ETH_MAX_CLK, eth->clks);  in at91_pm_config_quirks()
454 		 * Release the reference to eth->dev taken in  in at91_pm_config_quirks()
457 		put_device(eth->dev);  in at91_pm_config_quirks()
458 		eth->dev = NULL;  in at91_pm_config_quirks()
481 		soc_pm.data.mode = -1;  in at91_pm_begin()
489 		soc_pm.bu->suspended = 1;  in at91_pm_begin()
491 		soc_pm.bu->suspended = 0;  in at91_pm_begin()
498  * slow-clock mode.
509 		pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");  in at91_pm_verify_clocks()
521 			pr_err("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css);  in at91_pm_verify_clocks()
537  * to add one generic API rather than lots of platform-specific ones.
571 		/* Store pull-down output impedance select. */  in at91_suspend_finish()
573 		soc_pm.bu->ddr_phy_calibration[0] = modified_fix_code[index] << DDR3PHY_ZQ0SR0_PDO_OFF;  in at91_suspend_finish()
575 		/* Store pull-up output impedance select. */  in at91_suspend_finish()
577 		soc_pm.bu->ddr_phy_calibration[0] |= modified_fix_code[index] << DDR3PHY_ZQ0SR0_PUO_OFF;  in at91_suspend_finish()
579 		/* Store pull-down on-die termination impedance select. */  in at91_suspend_finish()
581 		soc_pm.bu->ddr_phy_calibration[0] |= modified_fix_code[index] << DDR3PHY_ZQ0SR0_PDODT_OFF;  in at91_suspend_finish()
583 		/* Store pull-up on-die termination impedance select. */  in at91_suspend_finish()
585 		soc_pm.bu->ddr_phy_calibration[0] |= modified_fix_code[index] << DDR3PHY_ZQ0SRO_PUODT_OFF;  in at91_suspend_finish()
593 			soc_pm.bu->ddr_phy_calibration[i] =  in at91_suspend_finish()
594 				*((unsigned int *)soc_pm.memcs + (i - 1));  in at91_suspend_finish()
606  * at91_pm_switch_ba_to_auto() - Configure Backup Unit Power Switch
615  * required. If it is in software-controlled mode, it is switched to automatic
700 		pr_debug("AT91: PM - bogus suspend state %d\n", state);  in at91_pm_enter()
726 	.name = "cpuidle-at91",
730  * The AT91RM9200 goes into self-refresh mode with this command, and will
731  * terminate self-refresh automatically on the next SDRAM access.
733  * Self-refresh mode is exited as soon as a memory access is made, but we don't
734  * know for sure when that happens. However, we need to restore the low-power
735  * mode if it was enabled before going idle. Restoring low-power mode while
736  * still in self-refresh is "not recommended", but seems to work.
756 	/* Those two values allow us to delay self-refresh activation  in at91_ddr_standby()
762 	/* LPDDR1 --> force DDR2 mode during self-refresh */  in at91_ddr_standby()
786 	/* self-refresh mode now */  in at91_ddr_standby()
835 	/* self-refresh mode now */  in at91sam9_sdram_standby()
855 	 * Place RAM into self-refresh after a maximum idle clocks. The maximum  in sama7g5_standby()
885 	{ .compatible = "atmel,at91rm9200-sdramc", .data = &ramc_infos[0] },
886 	{ .compatible = "atmel,at91sam9260-sdramc", .data = &ramc_infos[1] },
887 	{ .compatible = "atmel,at91sam9g45-ddramc", .data = &ramc_infos[2] },
888 	{ .compatible = "atmel,sama5d3-ddramc", .data = &ramc_infos[3] },
889 	{ .compatible = "microchip,sama7g5-uddrc", .data = &ramc_infos[4], },
894 	{ .compatible = "microchip,sama7g5-ddr3phy", },
911 			ret = -ENOMEM;  in at91_dt_ramc()
916 		ramc = of_id->data;  in at91_dt_ramc()
919 				standby = ramc->idle;  in at91_dt_ramc()
920 			soc_pm.data.memctrl = ramc->memctrl;  in at91_dt_ramc()
928 		ret = -ENODEV;  in at91_dt_ramc()
937 			ret = -ENOMEM;  in at91_dt_ramc()
945 		ret = -ENODEV;  in at91_dt_ramc()
960 		iounmap(soc_pm.data.ramc[--idx]);  in at91_dt_ramc()
969 	 * re-enabled by an interrupt or by a reset.  in at91rm9200_idle()
988 	for_each_compatible_node(node, NULL, "mmio-sram") {  in at91_pm_sram_init()
1001 	sram_pool = gen_pool_get(&pdev->dev, NULL);  in at91_pm_sram_init()
1027 	put_device(&pdev->dev);  in at91_pm_sram_init()
1070 	int ret = -ENODEV, located = 0;  in at91_pm_backup_init()
1075 		return -EPERM;  in at91_pm_backup_init()
1080 	np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-securam");  in at91_pm_backup_init()
1091 	sram_pool = gen_pool_get(&pdev->dev, NULL);  in at91_pm_backup_init()
1100 		ret = -ENOMEM;  in at91_pm_backup_init()
1104 	soc_pm.bu->suspended = 0;  in at91_pm_backup_init()
1105 	soc_pm.bu->canary = __pa_symbol(&canary);  in at91_pm_backup_init()
1106 	soc_pm.bu->resume = __pa_symbol(cpu_resume);  in at91_pm_backup_init()
1116 	put_device(&pdev->dev);  in at91_pm_backup_init()
1142 		soc_pm.data.mode = -1;  in at91_pm_secure_init()
1153 	{ .compatible = "atmel,sama5d2-shdwc" },
1154 	{ .compatible = "microchip,sam9x60-shdwc" },
1155 	{ .compatible = "microchip,sama7g5-shdwc" },
1160 	{ .compatible = "atmel,sama5d3-gem" },
1161 	{ .compatible = "atmel,sama5d2-gem" },
1162 	{ .compatible = "atmel,sama5d29-gem" },
1163 	{ .compatible = "microchip,sama7g5-gem" },
1168 	{ .compatible = "atmel,sama5d3-macb" },
1169 	{ .compatible = "microchip,sama7g5-emac" },
1275 		np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-sfrbu");  in at91_pm_modes_init()
1298 			gmac->np = np;  in at91_pm_modes_init()
1299 			at91_pm_get_eth_clks(np, gmac->clks);  in at91_pm_modes_init()
1304 			if (at91_pm_eth_clks_empty(gmac->clks))  in at91_pm_modes_init()
1308 			emac->np = np;  in at91_pm_modes_init()
1309 			ret = at91_pm_get_eth_clks(np, emac->clks);  in at91_pm_modes_init()
1310 			if (ret && at91_pm_eth_clks_empty(gmac->clks)) {  in at91_pm_modes_init()
1311 				of_node_put(gmac->np);  in at91_pm_modes_init()
1312 				of_node_put(emac->np);  in at91_pm_modes_init()
1313 				gmac->np = NULL;  in at91_pm_modes_init()
1314 				emac->np = NULL;  in at91_pm_modes_init()
1385 	{ .compatible = "atmel,at91rm9200-pmc", .data = &pmc_infos[0] },
1386 	{ .compatible = "atmel,at91sam9260-pmc", .data = &pmc_infos[1] },
1387 	{ .compatible = "atmel,at91sam9261-pmc", .data = &pmc_infos[1] },
1388 	{ .compatible = "atmel,at91sam9263-pmc", .data = &pmc_infos[1] },
1389 	{ .compatible = "atmel,at91sam9g45-pmc", .data = &pmc_infos[2] },
1390 	{ .compatible = "atmel,at91sam9n12-pmc", .data = &pmc_infos[1] },
1391 	{ .compatible = "atmel,at91sam9rl-pmc", .data = &pmc_infos[3] },
1392 	{ .compatible = "atmel,at91sam9x5-pmc", .data = &pmc_infos[1] },
1393 	{ .compatible = "atmel,sama5d3-pmc", .data = &pmc_infos[1] },
1394 	{ .compatible = "atmel,sama5d4-pmc", .data = &pmc_infos[1] },
1395 	{ .compatible = "atmel,sama5d2-pmc", .data = &pmc_infos[1] },
1396 	{ .compatible = "microchip,sam9x60-pmc", .data = &pmc_infos[4] },
1397 	{ .compatible = "microchip,sam9x7-pmc", .data = &pmc_infos[4] },
1398 	{ .compatible = "microchip,sama7d65-pmc", .data = &pmc_infos[6] },
1399 	{ .compatible = "microchip,sama7g5-pmc", .data = &pmc_infos[5] },
1465 	pmc = of_id->data;  in at91_pm_init()
1466 	soc_pm.data.uhp_udp_mask = pmc->uhp_udp_mask;  in at91_pm_init()
1467 	soc_pm.data.pmc_mckr_offset = pmc->mckr;  in at91_pm_init()
1468 	soc_pm.data.pmc_version = pmc->version;  in at91_pm_init()
1469 	soc_pm.data.pmc_mcks = pmc->mcks;  in at91_pm_init()
1506 	 * AT91RM9200 SDRAM low-power mode cannot be used with self-refresh.  in at91rm9200_pm_init()