Lines Matching +full:0 +full:xe4000000
14 bootscr-address = /bits/ 64 <0x3000000>;
20 #size-cells = <0>;
22 cpu0: cpu@0 {
25 reg = <0>;
54 interrupts = <0 5 4>, <0 6 4>;
56 reg = <0xf8891000 0x1000>,
57 <0xf8893000 0x1000>;
76 #size-cells = <0>;
79 port@0 {
80 reg = <0>;
112 reg = <0xf8007100 0x20>;
113 interrupts = <0 7 4>;
123 reg = <0xe0008000 0x1000>;
124 interrupts = <0 28 4>;
126 tx-fifo-depth = <0x40>;
127 rx-fifo-depth = <0x40>;
135 reg = <0xe0009000 0x1000>;
136 interrupts = <0 51 4>;
138 tx-fifo-depth = <0x40>;
139 rx-fifo-depth = <0x40>;
150 interrupts = <0 20 4>;
151 reg = <0xe000a000 0x1000>;
159 interrupts = <0 25 4>;
161 reg = <0xe0004000 0x1000>;
163 #size-cells = <0>;
171 interrupts = <0 48 4>;
173 reg = <0xe0005000 0x1000>;
175 #size-cells = <0>;
182 reg = <0xF8F01000 0x1000>,
183 <0xF8F00100 0x100>;
188 reg = <0xF8F02000 0x1000>;
189 interrupts = <0 2 4>;
198 reg = <0xf8006000 0x1000>;
203 reg = <0xfffc0000 0x10000>;
206 ranges = <0 0xfffc0000 0x10000>;
207 ocm-sram@0 {
208 reg = <0x0 0x10000>;
217 reg = <0xE0000000 0x1000>;
218 interrupts = <0 27 4>;
226 reg = <0xE0001000 0x1000>;
227 interrupts = <0 50 4>;
232 reg = <0xe0006000 0x1000>;
235 interrupts = <0 26 4>;
239 #size-cells = <0>;
244 reg = <0xe0007000 0x1000>;
247 interrupts = <0 49 4>;
251 #size-cells = <0>;
256 reg = <0xe000d000 0x1000>;
258 interrupts = <0 19 4>;
263 #size-cells = <0>;
268 reg = <0xe000b000 0x1000>;
270 interrupts = <0 22 4>;
274 #size-cells = <0>;
279 reg = <0xe000c000 0x1000>;
281 interrupts = <0 45 4>;
285 #size-cells = <0>;
290 reg = <0xe000e000 0x0001000>;
294 ranges = <0x0 0x0 0xe1000000 0x1000000 /* Nand CS region */
295 0x1 0x0 0xe2000000 0x2000000 /* SRAM/NOR CS0 region */
296 0x2 0x0 0xe4000000 0x2000000>; /* SRAM/NOR CS1 region */
300 interrupts = <0 18 4>;
302 nfc0: nand-controller@0,0 {
304 reg = <0 0 0x1000000>;
307 nor0: flash@1,0 {
310 reg = <1 0 0x2000000>;
320 interrupts = <0 24 4>;
321 reg = <0xe0100000 0x1000>;
330 interrupts = <0 47 4>;
331 reg = <0xe0101000 0x1000>;
339 reg = <0xF8000000 0x1000>;
345 fclk-enable = <0>;
357 reg = <0x100 0x100>;
362 reg = <0x200 0x48>;
369 reg = <0x700 0x200>;
376 reg = <0xf8003000 0x1000>;
382 interrupts = <0 13 4>,
383 <0 14 4>, <0 15 4>,
384 <0 16 4>, <0 17 4>,
385 <0 40 4>, <0 41 4>,
386 <0 42 4>, <0 43 4>;
394 reg = <0xf8007000 0x100>;
396 interrupts = <0 8 4>;
404 reg = <0xf8f00200 0x20>;
405 interrupts = <1 11 0x301>;
412 interrupts = <0 10 4>, <0 11 4>, <0 12 4>;
415 reg = <0xF8001000 0x1000>;
420 interrupts = <0 37 4>, <0 38 4>, <0 39 4>;
423 reg = <0xF8002000 0x1000>;
429 interrupts = <1 13 0x301>;
431 reg = <0xf8f00600 0x20>;
440 interrupts = <0 21 4>;
441 reg = <0xe0002000 0x1000>;
450 interrupts = <0 44 4>;
451 reg = <0xe0003000 0x1000>;
459 interrupts = <0 9 1>;
460 reg = <0xf8005000 0x1000>;
466 reg = <0xf8801000 0x1000>;
480 reg = <0xf8803000 0x1000>;
494 reg = <0xf8804000 0x1000>;
510 #size-cells = <0>;
513 port@0 {
514 reg = <0>;
538 reg = <0xf889c000 0x1000>;
553 reg = <0xf889d000 0x1000>;