Lines Matching +full:6 +full:e +full:- +full:7
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
9 /omit-if-no-ref/
10 adc1_ain_pins_a: adc1-ain-0 {
21 /omit-if-no-ref/
22 adc1_in6_pins_a: adc1-in6-0 {
28 /omit-if-no-ref/
29 adc1_in10_pins_a: adc1-in10-0 {
35 /omit-if-no-ref/
36 adc12_ain_pins_a: adc12-ain-0 {
45 /omit-if-no-ref/
46 adc12_ain_pins_b: adc12-ain-1 {
53 /omit-if-no-ref/
54 adc12_usb_cc_pins_a: adc12-usb-cc-pins-0 {
61 /omit-if-no-ref/
62 cec_pins_a: cec-0 {
65 bias-disable;
66 drive-open-drain;
67 slew-rate = <0>;
71 /omit-if-no-ref/
72 cec_sleep_pins_a: cec-sleep-0 {
78 /omit-if-no-ref/
79 cec_pins_b: cec-1 {
81 pinmux = <STM32_PINMUX('B', 6, AF5)>;
82 bias-disable;
83 drive-open-drain;
84 slew-rate = <0>;
88 /omit-if-no-ref/
89 cec_sleep_pins_b: cec-sleep-1 {
91 pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* HDMI_CEC */
95 /omit-if-no-ref/
96 dac_ch1_pins_a: dac-ch1-0 {
102 /omit-if-no-ref/
103 dac_ch2_pins_a: dac-ch2-0 {
109 /omit-if-no-ref/
110 dcmi_pins_a: dcmi-0 {
113 <STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */
114 <STM32_PINMUX('A', 6, AF13)>,/* DCMI_PIXCLK */
122 <STM32_PINMUX('E', 6, AF13)>,/* DCMI_D7 */
124 <STM32_PINMUX('H', 7, AF13)>,/* DCMI_D9 */
127 bias-disable;
131 /omit-if-no-ref/
132 dcmi_sleep_pins_a: dcmi-sleep-0 {
135 <STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_VSYNC */
136 <STM32_PINMUX('A', 6, ANALOG)>,/* DCMI_PIXCLK */
144 <STM32_PINMUX('E', 6, ANALOG)>,/* DCMI_D7 */
146 <STM32_PINMUX('H', 7, ANALOG)>,/* DCMI_D9 */
152 /omit-if-no-ref/
153 dcmi_pins_b: dcmi-1 {
156 <STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */
157 <STM32_PINMUX('A', 6, AF13)>,/* DCMI_PIXCLK */
158 <STM32_PINMUX('C', 6, AF13)>,/* DCMI_D0 */
161 <STM32_PINMUX('E', 1, AF13)>,/* DCMI_D3 */
162 <STM32_PINMUX('E', 11, AF13)>,/* DCMI_D4 */
164 <STM32_PINMUX('E', 13, AF13)>,/* DCMI_D6 */
166 bias-disable;
170 /omit-if-no-ref/
171 dcmi_sleep_pins_b: dcmi-sleep-1 {
174 <STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_VSYNC */
175 <STM32_PINMUX('A', 6, ANALOG)>,/* DCMI_PIXCLK */
176 <STM32_PINMUX('C', 6, ANALOG)>,/* DCMI_D0 */
179 <STM32_PINMUX('E', 1, ANALOG)>,/* DCMI_D3 */
180 <STM32_PINMUX('E', 11, ANALOG)>,/* DCMI_D4 */
182 <STM32_PINMUX('E', 13, ANALOG)>,/* DCMI_D6 */
187 /omit-if-no-ref/
188 dcmi_pins_c: dcmi-2 {
191 <STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */
192 <STM32_PINMUX('A', 6, AF13)>,/* DCMI_PIXCLK */
195 <STM32_PINMUX('E', 0, AF13)>,/* DCMI_D2 */
196 <STM32_PINMUX('E', 1, AF13)>,/* DCMI_D3 */
199 <STM32_PINMUX('I', 6, AF13)>,/* DCMI_D6 */
200 <STM32_PINMUX('E', 6, AF13)>,/* DCMI_D7 */
202 <STM32_PINMUX('H', 7, AF13)>;/* DCMI_D9 */
203 bias-pull-up;
207 /omit-if-no-ref/
208 dcmi_sleep_pins_c: dcmi-sleep-2 {
211 <STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_VSYNC */
212 <STM32_PINMUX('A', 6, ANALOG)>,/* DCMI_PIXCLK */
215 <STM32_PINMUX('E', 0, ANALOG)>,/* DCMI_D2 */
216 <STM32_PINMUX('E', 1, ANALOG)>,/* DCMI_D3 */
219 <STM32_PINMUX('I', 6, ANALOG)>,/* DCMI_D6 */
220 <STM32_PINMUX('E', 6, ANALOG)>,/* DCMI_D7 */
222 <STM32_PINMUX('H', 7, ANALOG)>;/* DCMI_D9 */
226 /omit-if-no-ref/
227 ethernet0_rgmii_pins_a: rgmii-0 {
234 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
237 bias-disable;
238 drive-push-pull;
239 slew-rate = <2>;
243 bias-disable;
244 drive-push-pull;
245 slew-rate = <0>;
253 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
254 bias-disable;
258 /omit-if-no-ref/
259 ethernet0_rgmii_sleep_pins_a: rgmii-sleep-0 {
266 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
275 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
279 /omit-if-no-ref/
280 ethernet0_rgmii_pins_b: rgmii-1 {
287 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
290 bias-disable;
291 drive-push-pull;
292 slew-rate = <2>;
296 bias-disable;
297 drive-push-pull;
298 slew-rate = <0>;
303 <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
304 <STM32_PINMUX('H', 7, AF11)>, /* ETH_RGMII_RXD3 */
306 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
307 bias-disable;
311 /omit-if-no-ref/
312 ethernet0_rgmii_sleep_pins_b: rgmii-sleep-1 {
319 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
325 <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
326 <STM32_PINMUX('H', 7, ANALOG)>, /* ETH_RGMII_RXD3 */
328 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
332 /omit-if-no-ref/
333 ethernet0_rgmii_pins_c: rgmii-2 {
340 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
343 bias-disable;
344 drive-push-pull;
345 slew-rate = <2>;
349 bias-disable;
350 drive-push-pull;
351 slew-rate = <0>;
356 <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
359 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
360 bias-disable;
364 /omit-if-no-ref/
365 ethernet0_rgmii_sleep_pins_c: rgmii-sleep-2 {
372 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
378 <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
381 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
385 /omit-if-no-ref/
386 ethernet0_rgmii_pins_d: rgmii-3 {
392 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
395 bias-disable;
396 drive-push-pull;
397 slew-rate = <2>;
401 bias-disable;
402 drive-push-pull;
403 slew-rate = <0>;
408 <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
411 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
412 bias-disable;
416 /omit-if-no-ref/
417 ethernet0_rgmii_sleep_pins_d: rgmii-sleep-3 {
424 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
430 <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
433 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
437 /omit-if-no-ref/
438 ethernet0_rgmii_pins_e: rgmii-4 {
444 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
446 bias-disable;
447 drive-push-pull;
448 slew-rate = <2>;
453 <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
454 <STM32_PINMUX('H', 7, AF11)>, /* ETH_RGMII_RXD3 */
456 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
457 bias-disable;
461 /omit-if-no-ref/
462 ethernet0_rgmii_sleep_pins_e: rgmii-sleep-4 {
468 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
472 <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
473 <STM32_PINMUX('H', 7, ANALOG)>, /* ETH_RGMII_RXD3 */
475 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
479 /omit-if-no-ref/
480 ethernet0_rmii_pins_a: rmii-0 {
488 bias-disable;
489 drive-push-pull;
490 slew-rate = <2>;
495 <STM32_PINMUX('A', 7, AF11)>; /* ETH1_RMII_CRS_DV */
496 bias-disable;
500 /omit-if-no-ref/
501 ethernet0_rmii_sleep_pins_a: rmii-sleep-0 {
511 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH1_RMII_CRS_DV */
515 /omit-if-no-ref/
516 ethernet0_rmii_pins_b: rmii-1 {
522 bias-disable;
523 drive-push-pull;
524 slew-rate = <1>;
528 bias-disable;
529 drive-push-pull;
530 slew-rate = <0>;
533 pinmux = <STM32_PINMUX('A', 7, AF11)>, /* ETH1_CRS_DV */
536 bias-disable;
543 /omit-if-no-ref/
544 ethernet0_rmii_sleep_pins_b: rmii-sleep-1 {
547 <STM32_PINMUX('A', 7, ANALOG)>, /* ETH1_CRS_DV */
558 /omit-if-no-ref/
559 ethernet0_rmii_pins_c: rmii-2 {
567 bias-disable;
568 drive-push-pull;
569 slew-rate = <2>;
574 <STM32_PINMUX('A', 7, AF11)>; /* ETH1_RMII_CRS_DV */
575 bias-disable;
579 /omit-if-no-ref/
580 ethernet0_rmii_sleep_pins_c: rmii-sleep-2 {
590 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH1_RMII_CRS_DV */
594 /omit-if-no-ref/
595 ethernet0_rmii_pins_d: rmii-3 {
603 bias-disable;
604 drive-push-pull;
605 slew-rate = <2>;
611 <STM32_PINMUX('A', 7, AF11)>; /* ETH1_RMII_CRS_DV */
612 bias-disable;
616 /omit-if-no-ref/
617 ethernet0_rmii_sleep_pins_d: rmii-sleep-3 {
627 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH1_RMII_CRS_DV */
631 /omit-if-no-ref/
632 fmc_pins_a: fmc-0 {
642 <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
643 <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
644 <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
645 <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
647 bias-disable;
648 drive-push-pull;
649 slew-rate = <1>;
652 pinmux = <STM32_PINMUX('D', 6, AF12)>; /* FMC_NWAIT */
653 bias-pull-up;
657 /omit-if-no-ref/
658 fmc_sleep_pins_a: fmc-sleep-0 {
668 <STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */
669 <STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */
670 <STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */
671 <STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */
672 <STM32_PINMUX('D', 6, ANALOG)>, /* FMC_NWAIT */
677 /omit-if-no-ref/
678 fmc_pins_b: fmc-1 {
682 <STM32_PINMUX('B', 7, AF12)>, /* FMC_NL */
687 <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
688 <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
689 <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
690 <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
691 <STM32_PINMUX('E', 11, AF12)>, /* FMC_D8 */
692 <STM32_PINMUX('E', 12, AF12)>, /* FMC_D9 */
693 <STM32_PINMUX('E', 13, AF12)>, /* FMC_D10 */
694 <STM32_PINMUX('E', 14, AF12)>, /* FMC_D11 */
695 <STM32_PINMUX('E', 15, AF12)>, /* FMC_D12 */
701 bias-disable;
702 drive-push-pull;
703 slew-rate = <3>;
707 /omit-if-no-ref/
708 fmc_sleep_pins_b: fmc-sleep-1 {
712 <STM32_PINMUX('B', 7, ANALOG)>, /* FMC_NL */
717 <STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */
718 <STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */
719 <STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */
720 <STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */
721 <STM32_PINMUX('E', 11, ANALOG)>, /* FMC_D8 */
722 <STM32_PINMUX('E', 12, ANALOG)>, /* FMC_D9 */
723 <STM32_PINMUX('E', 13, ANALOG)>, /* FMC_D10 */
724 <STM32_PINMUX('E', 14, ANALOG)>, /* FMC_D11 */
725 <STM32_PINMUX('E', 15, ANALOG)>, /* FMC_D12 */
734 /omit-if-no-ref/
735 i2c1_pins_a: i2c1-0 {
739 bias-disable;
740 drive-open-drain;
741 slew-rate = <0>;
745 /omit-if-no-ref/
746 i2c1_sleep_pins_a: i2c1-sleep-0 {
753 /omit-if-no-ref/
754 i2c1_pins_b: i2c1-1 {
758 bias-disable;
759 drive-open-drain;
760 slew-rate = <0>;
764 /omit-if-no-ref/
765 i2c1_sleep_pins_b: i2c1-sleep-1 {
772 /omit-if-no-ref/
773 i2c1_pins_c: i2c1-2 {
777 bias-disable;
778 drive-open-drain;
779 slew-rate = <0>;
783 /omit-if-no-ref/
784 i2c1_sleep_pins_c: i2c1-sleep-2 {
791 /omit-if-no-ref/
792 i2c2_pins_a: i2c2-0 {
796 bias-disable;
797 drive-open-drain;
798 slew-rate = <0>;
802 /omit-if-no-ref/
803 i2c2_sleep_pins_a: i2c2-sleep-0 {
810 /omit-if-no-ref/
811 i2c2_pins_b1: i2c2-1 {
814 bias-disable;
815 drive-open-drain;
816 slew-rate = <0>;
820 /omit-if-no-ref/
821 i2c2_sleep_pins_b1: i2c2-sleep-1 {
827 /omit-if-no-ref/
828 i2c2_pins_c: i2c2-2 {
832 bias-disable;
833 drive-open-drain;
834 slew-rate = <0>;
838 /omit-if-no-ref/
839 i2c2_pins_sleep_c: i2c2-sleep-2 {
846 /omit-if-no-ref/
847 i2c5_pins_a: i2c5-0 {
851 bias-disable;
852 drive-open-drain;
853 slew-rate = <0>;
857 /omit-if-no-ref/
858 i2c5_sleep_pins_a: i2c5-sleep-0 {
866 /omit-if-no-ref/
867 i2c5_pins_b: i2c5-1 {
871 bias-disable;
872 drive-open-drain;
873 slew-rate = <0>;
877 /omit-if-no-ref/
878 i2c5_sleep_pins_b: i2c5-sleep-1 {
885 /omit-if-no-ref/
886 i2s1_pins_a: i2s1-0 {
888 pinmux = <STM32_PINMUX('A', 6, AF5)>, /* I2S2_SDI */
891 slew-rate = <0>;
892 drive-push-pull;
893 bias-disable;
897 /omit-if-no-ref/
898 i2s1_sleep_pins_a: i2s1-sleep-0 {
900 pinmux = <STM32_PINMUX('A', 6, ANALOG)>, /* I2S2_SDI */
906 /omit-if-no-ref/
907 i2s2_pins_a: i2s2-0 {
912 slew-rate = <1>;
913 drive-push-pull;
914 bias-disable;
918 /omit-if-no-ref/
919 i2s2_sleep_pins_a: i2s2-sleep-0 {
927 /omit-if-no-ref/
928 i2s2_pins_b: i2s2-1 {
933 bias-disable;
934 drive-push-pull;
935 slew-rate = <1>;
939 /omit-if-no-ref/
940 i2s2_sleep_pins_b: i2s2-sleep-1 {
948 /omit-if-no-ref/
949 ltdc_pins_a: ltdc-0 {
951 pinmux = <STM32_PINMUX('G', 7, AF14)>, /* LCD_CLK */
962 <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
963 <STM32_PINMUX('E', 5, AF14)>, /* LCD_G0 */
964 <STM32_PINMUX('E', 6, AF14)>, /* LCD_G1 */
979 bias-disable;
980 drive-push-pull;
981 slew-rate = <1>;
985 /omit-if-no-ref/
986 ltdc_sleep_pins_a: ltdc-sleep-0 {
988 pinmux = <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_CLK */
999 <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
1000 <STM32_PINMUX('E', 5, ANALOG)>, /* LCD_G0 */
1001 <STM32_PINMUX('E', 6, ANALOG)>, /* LCD_G1 */
1019 /omit-if-no-ref/
1020 ltdc_pins_b: ltdc-1 {
1025 <STM32_PINMUX('K', 7, AF14)>, /* LCD_DE */
1033 <STM32_PINMUX('J', 6, AF14)>, /* LCD_R7 */
1034 <STM32_PINMUX('J', 7, AF14)>, /* LCD_G0 */
1049 <STM32_PINMUX('K', 6, AF14)>; /* LCD_B7 */
1050 bias-disable;
1051 drive-push-pull;
1052 slew-rate = <1>;
1056 /omit-if-no-ref/
1057 ltdc_sleep_pins_b: ltdc-sleep-1 {
1062 <STM32_PINMUX('K', 7, ANALOG)>, /* LCD_DE */
1070 <STM32_PINMUX('J', 6, ANALOG)>, /* LCD_R7 */
1071 <STM32_PINMUX('J', 7, ANALOG)>, /* LCD_G0 */
1086 <STM32_PINMUX('K', 6, ANALOG)>; /* LCD_B7 */
1090 /omit-if-no-ref/
1091 ltdc_pins_c: ltdc-2 {
1097 <STM32_PINMUX('D', 6, AF14)>, /* LTDC_B2 */
1099 <STM32_PINMUX('E', 11, AF14)>, /* LTDC_G3 */
1100 <STM32_PINMUX('E', 12, AF14)>, /* LTDC_B4 */
1101 <STM32_PINMUX('E', 13, AF14)>, /* LTDC_DE */
1102 <STM32_PINMUX('E', 15, AF14)>, /* LTDC_R7 */
1111 <STM32_PINMUX('I', 6, AF14)>, /* LTDC_B6 */
1114 bias-disable;
1115 drive-push-pull;
1116 slew-rate = <0>;
1119 pinmux = <STM32_PINMUX('E', 14, AF14)>; /* LTDC_CLK */
1120 bias-disable;
1121 drive-push-pull;
1122 slew-rate = <1>;
1126 /omit-if-no-ref/
1127 ltdc_sleep_pins_c: ltdc-sleep-2 {
1133 <STM32_PINMUX('D', 6, ANALOG)>, /* LTDC_B2 */
1135 <STM32_PINMUX('E', 11, ANALOG)>, /* LTDC_G3 */
1136 <STM32_PINMUX('E', 12, ANALOG)>, /* LTDC_B4 */
1137 <STM32_PINMUX('E', 13, ANALOG)>, /* LTDC_DE */
1138 <STM32_PINMUX('E', 15, ANALOG)>, /* LTDC_R7 */
1147 <STM32_PINMUX('I', 6, ANALOG)>, /* LTDC_B6 */
1150 <STM32_PINMUX('E', 14, ANALOG)>; /* LTDC_CLK */
1154 /omit-if-no-ref/
1155 ltdc_pins_d: ltdc-3 {
1157 pinmux = <STM32_PINMUX('G', 7, AF14)>; /* LCD_CLK */
1158 bias-disable;
1159 drive-push-pull;
1160 slew-rate = <3>;
1165 <STM32_PINMUX('E', 13, AF14)>, /* LCD_DE */
1173 <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
1174 <STM32_PINMUX('E', 5, AF14)>, /* LCD_G0 */
1177 <STM32_PINMUX('E', 11, AF14)>, /* LCD_G3 */
1186 <STM32_PINMUX('E', 12, AF14)>, /* LCD_B4 */
1189 <STM32_PINMUX('I', 7, AF14)>; /* LCD_B7 */
1190 bias-disable;
1191 drive-push-pull;
1192 slew-rate = <2>;
1196 /omit-if-no-ref/
1197 ltdc_sleep_pins_d: ltdc-sleep-3 {
1199 pinmux = <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_CLK */
1202 <STM32_PINMUX('E', 13, ANALOG)>, /* LCD_DE */
1210 <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
1211 <STM32_PINMUX('E', 5, ANALOG)>, /* LCD_G0 */
1214 <STM32_PINMUX('E', 11, ANALOG)>, /* LCD_G3 */
1223 <STM32_PINMUX('E', 12, ANALOG)>, /* LCD_B4 */
1226 <STM32_PINMUX('I', 7, ANALOG)>; /* LCD_B7 */
1230 /omit-if-no-ref/
1231 ltdc_pins_e: ltdc-4 {
1240 <STM32_PINMUX('E', 15, AF14)>, /* LTDC_R7 */
1241 <STM32_PINMUX('E', 14, AF13)>, /* LTDC_G0 */
1242 <STM32_PINMUX('E', 6, AF14)>, /* LTDC_G1 */
1253 <STM32_PINMUX('E', 12, AF14)>, /* LTDC_B4 */
1260 bias-disable;
1261 drive-push-pull;
1262 slew-rate = <0>;
1266 pinmux = <STM32_PINMUX('G', 7, AF14)>; /* LTDC_CLK */
1267 bias-disable;
1268 drive-push-pull;
1269 slew-rate = <1>;
1273 /omit-if-no-ref/
1274 ltdc_sleep_pins_e: ltdc-sleep-4 {
1283 <STM32_PINMUX('E', 15, ANALOG)>, /* LTDC_R7 */
1288 <STM32_PINMUX('E', 12, ANALOG)>, /* LTDC_B4 */
1292 <STM32_PINMUX('E', 14, ANALOG)>, /* LTDC_G0 */
1293 <STM32_PINMUX('E', 6, ANALOG)>, /* LTDC_G1 */
1303 <STM32_PINMUX('G', 7, ANALOG)>; /* LTDC_CLK */
1307 /omit-if-no-ref/
1308 mco1_pins_a: mco1-0 {
1311 bias-disable;
1312 drive-push-pull;
1313 slew-rate = <1>;
1317 /omit-if-no-ref/
1318 mco1_sleep_pins_a: mco1-sleep-0 {
1324 /omit-if-no-ref/
1325 mco2_pins_a: mco2-0 {
1328 bias-disable;
1329 drive-push-pull;
1330 slew-rate = <2>;
1334 /omit-if-no-ref/
1335 mco2_sleep_pins_a: mco2-sleep-0 {
1341 /omit-if-no-ref/
1342 m_can1_pins_a: m-can1-0 {
1345 slew-rate = <1>;
1346 drive-push-pull;
1347 bias-disable;
1351 bias-disable;
1355 /omit-if-no-ref/
1356 m_can1_sleep_pins_a: m_can1-sleep-0 {
1363 /omit-if-no-ref/
1364 m_can1_pins_b: m-can1-1 {
1367 slew-rate = <1>;
1368 drive-push-pull;
1369 bias-disable;
1373 bias-disable;
1377 /omit-if-no-ref/
1378 m_can1_sleep_pins_b: m_can1-sleep-1 {
1385 /omit-if-no-ref/
1386 m_can1_pins_c: m-can1-2 {
1389 slew-rate = <1>;
1390 drive-push-pull;
1391 bias-disable;
1395 bias-disable;
1399 /omit-if-no-ref/
1400 m_can1_sleep_pins_c: m_can1-sleep-2 {
1407 /omit-if-no-ref/
1408 m_can1_pins_d: m-can1-3 {
1411 slew-rate = <1>;
1412 drive-push-pull;
1413 bias-disable;
1417 bias-disable;
1421 /omit-if-no-ref/
1422 m_can1_sleep_pins_d: m_can1-sleep-3 {
1429 /omit-if-no-ref/
1430 m_can2_pins_a: m-can2-0 {
1433 slew-rate = <1>;
1434 drive-push-pull;
1435 bias-disable;
1439 bias-disable;
1443 /omit-if-no-ref/
1444 m_can2_sleep_pins_a: m_can2-sleep-0 {
1451 /omit-if-no-ref/
1452 pwm1_pins_a: pwm1-0 {
1454 pinmux = <STM32_PINMUX('E', 9, AF1)>, /* TIM1_CH1 */
1455 <STM32_PINMUX('E', 11, AF1)>, /* TIM1_CH2 */
1456 <STM32_PINMUX('E', 14, AF1)>; /* TIM1_CH4 */
1457 bias-pull-down;
1458 drive-push-pull;
1459 slew-rate = <0>;
1463 /omit-if-no-ref/
1464 pwm1_sleep_pins_a: pwm1-sleep-0 {
1466 pinmux = <STM32_PINMUX('E', 9, ANALOG)>, /* TIM1_CH1 */
1467 <STM32_PINMUX('E', 11, ANALOG)>, /* TIM1_CH2 */
1468 <STM32_PINMUX('E', 14, ANALOG)>; /* TIM1_CH4 */
1472 /omit-if-no-ref/
1473 pwm1_pins_b: pwm1-1 {
1475 pinmux = <STM32_PINMUX('E', 9, AF1)>; /* TIM1_CH1 */
1476 bias-pull-down;
1477 drive-push-pull;
1478 slew-rate = <0>;
1482 /omit-if-no-ref/
1483 pwm1_sleep_pins_b: pwm1-sleep-1 {
1485 pinmux = <STM32_PINMUX('E', 9, ANALOG)>; /* TIM1_CH1 */
1489 /omit-if-no-ref/
1490 pwm1_pins_c: pwm1-2 {
1492 pinmux = <STM32_PINMUX('E', 11, AF1)>; /* TIM1_CH2 */
1493 drive-push-pull;
1494 slew-rate = <0>;
1498 /omit-if-no-ref/
1499 pwm1_sleep_pins_c: pwm1-sleep-2 {
1501 pinmux = <STM32_PINMUX('E', 11, ANALOG)>; /* TIM1_CH2 */
1505 /omit-if-no-ref/
1506 pwm1_pins_d: pwm1-3 {
1509 bias-pull-down;
1510 drive-push-pull;
1511 slew-rate = <0>;
1515 /omit-if-no-ref/
1516 pwm1_sleep_pins_d: pwm1-sleep-3 {
1522 /omit-if-no-ref/
1523 pwm2_pins_a: pwm2-0 {
1526 bias-pull-down;
1527 drive-push-pull;
1528 slew-rate = <0>;
1532 /omit-if-no-ref/
1533 pwm2_sleep_pins_a: pwm2-sleep-0 {
1539 /omit-if-no-ref/
1540 pwm3_pins_a: pwm3-0 {
1542 pinmux = <STM32_PINMUX('C', 7, AF2)>; /* TIM3_CH2 */
1543 bias-pull-down;
1544 drive-push-pull;
1545 slew-rate = <0>;
1549 /omit-if-no-ref/
1550 pwm3_sleep_pins_a: pwm3-sleep-0 {
1552 pinmux = <STM32_PINMUX('C', 7, ANALOG)>; /* TIM3_CH2 */
1556 /omit-if-no-ref/
1557 pwm3_pins_b: pwm3-1 {
1560 bias-disable;
1561 drive-push-pull;
1562 slew-rate = <0>;
1566 /omit-if-no-ref/
1567 pwm3_sleep_pins_b: pwm3-sleep-1 {
1573 /omit-if-no-ref/
1574 pwm4_pins_a: pwm4-0 {
1578 bias-pull-down;
1579 drive-push-pull;
1580 slew-rate = <0>;
1584 /omit-if-no-ref/
1585 pwm4_sleep_pins_a: pwm4-sleep-0 {
1592 /omit-if-no-ref/
1593 pwm4_pins_b: pwm4-1 {
1596 bias-pull-down;
1597 drive-push-pull;
1598 slew-rate = <0>;
1602 /omit-if-no-ref/
1603 pwm4_sleep_pins_b: pwm4-sleep-1 {
1609 /omit-if-no-ref/
1610 pwm5_pins_a: pwm5-0 {
1613 bias-pull-down;
1614 drive-push-pull;
1615 slew-rate = <0>;
1619 /omit-if-no-ref/
1620 pwm5_sleep_pins_a: pwm5-sleep-0 {
1626 /omit-if-no-ref/
1627 pwm5_pins_b: pwm5-1 {
1632 bias-disable;
1633 drive-push-pull;
1634 slew-rate = <0>;
1638 /omit-if-no-ref/
1639 pwm5_sleep_pins_b: pwm5-sleep-1 {
1647 /omit-if-no-ref/
1648 pwm8_pins_a: pwm8-0 {
1651 bias-pull-down;
1652 drive-push-pull;
1653 slew-rate = <0>;
1657 /omit-if-no-ref/
1658 pwm8_sleep_pins_a: pwm8-sleep-0 {
1664 /omit-if-no-ref/
1665 pwm8_pins_b: pwm8-1 {
1668 <STM32_PINMUX('I', 6, AF3)>, /* TIM8_CH2 */
1669 <STM32_PINMUX('I', 7, AF3)>, /* TIM8_CH3 */
1671 drive-push-pull;
1672 slew-rate = <0>;
1676 /omit-if-no-ref/
1677 pwm8_sleep_pins_b: pwm8-sleep-1 {
1680 <STM32_PINMUX('I', 6, ANALOG)>, /* TIM8_CH2 */
1681 <STM32_PINMUX('I', 7, ANALOG)>, /* TIM8_CH3 */
1686 /omit-if-no-ref/
1687 pwm12_pins_a: pwm12-0 {
1689 pinmux = <STM32_PINMUX('H', 6, AF2)>; /* TIM12_CH1 */
1690 bias-pull-down;
1691 drive-push-pull;
1692 slew-rate = <0>;
1696 /omit-if-no-ref/
1697 pwm12_sleep_pins_a: pwm12-sleep-0 {
1699 pinmux = <STM32_PINMUX('H', 6, ANALOG)>; /* TIM12_CH1 */
1703 /omit-if-no-ref/
1704 qspi_clk_pins_a: qspi-clk-0 {
1707 bias-disable;
1708 drive-push-pull;
1709 slew-rate = <3>;
1713 /omit-if-no-ref/
1714 qspi_clk_sleep_pins_a: qspi-clk-sleep-0 {
1720 /omit-if-no-ref/
1721 qspi_bk1_pins_a: qspi-bk1-0 {
1725 <STM32_PINMUX('F', 7, AF9)>, /* QSPI_BK1_IO2 */
1726 <STM32_PINMUX('F', 6, AF9)>; /* QSPI_BK1_IO3 */
1727 bias-disable;
1728 drive-push-pull;
1729 slew-rate = <1>;
1733 /omit-if-no-ref/
1734 qspi_bk1_sleep_pins_a: qspi-bk1-sleep-0 {
1738 <STM32_PINMUX('F', 7, ANALOG)>, /* QSPI_BK1_IO2 */
1739 <STM32_PINMUX('F', 6, ANALOG)>; /* QSPI_BK1_IO3 */
1743 /omit-if-no-ref/
1744 qspi_bk2_pins_a: qspi-bk2-0 {
1749 <STM32_PINMUX('G', 7, AF11)>; /* QSPI_BK2_IO3 */
1750 bias-disable;
1751 drive-push-pull;
1752 slew-rate = <1>;
1756 /omit-if-no-ref/
1757 qspi_bk2_sleep_pins_a: qspi-bk2-sleep-0 {
1762 <STM32_PINMUX('G', 7, ANALOG)>; /* QSPI_BK2_IO3 */
1766 /omit-if-no-ref/
1767 qspi_cs1_pins_a: qspi-cs1-0 {
1769 pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
1770 bias-pull-up;
1771 drive-push-pull;
1772 slew-rate = <1>;
1776 /omit-if-no-ref/
1777 qspi_cs1_sleep_pins_a: qspi-cs1-sleep-0 {
1779 pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* QSPI_BK1_NCS */
1783 /omit-if-no-ref/
1784 qspi_cs2_pins_a: qspi-cs2-0 {
1787 bias-pull-up;
1788 drive-push-pull;
1789 slew-rate = <1>;
1793 /omit-if-no-ref/
1794 qspi_cs2_sleep_pins_a: qspi-cs2-sleep-0 {
1800 /omit-if-no-ref/
1801 rtc_rsvd_pins_a: rtc-rsvd-0 {
1807 /omit-if-no-ref/
1808 sai2a_pins_a: sai2a-0 {
1811 <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */
1812 <STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */
1813 <STM32_PINMUX('E', 0, AF10)>; /* SAI2_MCLK_A */
1814 slew-rate = <0>;
1815 drive-push-pull;
1816 bias-disable;
1820 /omit-if-no-ref/
1821 sai2a_sleep_pins_a: sai2a-sleep-0 {
1824 <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */
1825 <STM32_PINMUX('I', 7, ANALOG)>, /* SAI2_FS_A */
1826 <STM32_PINMUX('E', 0, ANALOG)>; /* SAI2_MCLK_A */
1830 /omit-if-no-ref/
1831 sai2a_pins_b: sai2a-1 {
1833 pinmux = <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */
1834 <STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */
1836 slew-rate = <0>;
1837 drive-push-pull;
1838 bias-disable;
1842 /omit-if-no-ref/
1843 sai2a_sleep_pins_b: sai2a-sleep-1 {
1845 pinmux = <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */
1846 <STM32_PINMUX('I', 7, ANALOG)>, /* SAI2_FS_A */
1851 /omit-if-no-ref/
1852 sai2a_pins_c: sai2a-2 {
1857 slew-rate = <0>;
1858 drive-push-pull;
1859 bias-disable;
1863 /omit-if-no-ref/
1864 sai2a_sleep_pins_c: sai2a-sleep-2 {
1872 /omit-if-no-ref/
1873 sai2b_pins_a: sai2b-0 {
1875 pinmux = <STM32_PINMUX('E', 12, AF10)>, /* SAI2_SCK_B */
1876 <STM32_PINMUX('E', 13, AF10)>, /* SAI2_FS_B */
1877 <STM32_PINMUX('E', 14, AF10)>; /* SAI2_MCLK_B */
1878 slew-rate = <0>;
1879 drive-push-pull;
1880 bias-disable;
1884 bias-disable;
1888 /omit-if-no-ref/
1889 sai2b_sleep_pins_a: sai2b-sleep-0 {
1892 <STM32_PINMUX('E', 12, ANALOG)>, /* SAI2_SCK_B */
1893 <STM32_PINMUX('E', 13, ANALOG)>, /* SAI2_FS_B */
1894 <STM32_PINMUX('E', 14, ANALOG)>; /* SAI2_MCLK_B */
1898 /omit-if-no-ref/
1899 sai2b_pins_b: sai2b-1 {
1902 bias-disable;
1906 /omit-if-no-ref/
1907 sai2b_sleep_pins_b: sai2b-sleep-1 {
1913 /omit-if-no-ref/
1914 sai2b_pins_c: sai2b-2 {
1917 bias-disable;
1921 /omit-if-no-ref/
1922 sai2b_sleep_pins_c: sai2b-sleep-2 {
1928 /omit-if-no-ref/
1929 sai2b_pins_d: sai2b-3 {
1934 slew-rate = <0>;
1935 drive-push-pull;
1936 bias-disable;
1940 bias-disable;
1944 /omit-if-no-ref/
1945 sai2b_sleep_pins_d: sai2b-sleep-3 {
1954 /omit-if-no-ref/
1955 sai4a_pins_a: sai4a-0 {
1958 slew-rate = <0>;
1959 drive-push-pull;
1960 bias-disable;
1964 /omit-if-no-ref/
1965 sai4a_sleep_pins_a: sai4a-sleep-0 {
1971 /omit-if-no-ref/
1972 sdmmc1_b4_pins_a: sdmmc1-b4-0 {
1979 slew-rate = <1>;
1980 drive-push-pull;
1981 bias-disable;
1985 slew-rate = <2>;
1986 drive-push-pull;
1987 bias-disable;
1991 /omit-if-no-ref/
1992 sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
1998 slew-rate = <1>;
1999 drive-push-pull;
2000 bias-disable;
2004 slew-rate = <2>;
2005 drive-push-pull;
2006 bias-disable;
2010 slew-rate = <1>;
2011 drive-open-drain;
2012 bias-disable;
2016 /omit-if-no-ref/
2017 sdmmc1_b4_init_pins_a: sdmmc1-b4-init-0 {
2023 slew-rate = <1>;
2024 drive-push-pull;
2025 bias-disable;
2029 /omit-if-no-ref/
2030 sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
2041 /omit-if-no-ref/
2042 sdmmc1_b4_pins_b: sdmmc1-b4-1 {
2046 <STM32_PINMUX('E', 6, AF8)>, /* SDMMC1_D2 */
2049 slew-rate = <1>;
2050 drive-push-pull;
2051 bias-disable;
2055 slew-rate = <2>;
2056 drive-push-pull;
2057 bias-disable;
2061 /omit-if-no-ref/
2062 sdmmc1_b4_od_pins_b: sdmmc1-b4-od-1 {
2066 <STM32_PINMUX('E', 6, AF8)>, /* SDMMC1_D2 */
2068 slew-rate = <1>;
2069 drive-push-pull;
2070 bias-disable;
2074 slew-rate = <2>;
2075 drive-push-pull;
2076 bias-disable;
2080 slew-rate = <1>;
2081 drive-open-drain;
2082 bias-disable;
2086 /omit-if-no-ref/
2087 sdmmc1_b4_sleep_pins_b: sdmmc1-b4-sleep-1 {
2091 <STM32_PINMUX('E', 6, ANALOG)>, /* SDMMC1_D2 */
2098 /omit-if-no-ref/
2099 sdmmc1_dir_pins_a: sdmmc1-dir-0 {
2102 <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
2104 slew-rate = <1>;
2105 drive-push-pull;
2106 bias-pull-up;
2109 pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
2110 bias-pull-up;
2114 /omit-if-no-ref/
2115 sdmmc1_dir_init_pins_a: sdmmc1-dir-init-0 {
2118 <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
2120 slew-rate = <1>;
2121 drive-push-pull;
2122 bias-pull-up;
2126 /omit-if-no-ref/
2127 sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 {
2130 <STM32_PINMUX('C', 7, ANALOG)>, /* SDMMC1_D123DIR */
2132 <STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */
2136 /omit-if-no-ref/
2137 sdmmc1_dir_pins_b: sdmmc1-dir-1 {
2140 <STM32_PINMUX('E', 14, AF11)>, /* SDMMC1_D123DIR */
2142 slew-rate = <1>;
2143 drive-push-pull;
2144 bias-pull-up;
2147 pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
2148 bias-pull-up;
2152 /omit-if-no-ref/
2153 sdmmc1_dir_sleep_pins_b: sdmmc1-dir-sleep-1 {
2156 <STM32_PINMUX('E', 14, ANALOG)>, /* SDMMC1_D123DIR */
2158 <STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */
2162 /omit-if-no-ref/
2163 sdmmc2_b4_pins_a: sdmmc2-b4-0 {
2169 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
2170 slew-rate = <1>;
2171 drive-push-pull;
2172 bias-pull-up;
2175 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
2176 slew-rate = <2>;
2177 drive-push-pull;
2178 bias-pull-up;
2182 /omit-if-no-ref/
2183 sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
2189 slew-rate = <1>;
2190 drive-push-pull;
2191 bias-pull-up;
2194 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
2195 slew-rate = <2>;
2196 drive-push-pull;
2197 bias-pull-up;
2200 pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
2201 slew-rate = <1>;
2202 drive-open-drain;
2203 bias-pull-up;
2207 /omit-if-no-ref/
2208 sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
2214 <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */
2215 <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */
2219 /omit-if-no-ref/
2220 sdmmc2_b4_pins_b: sdmmc2-b4-1 {
2226 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
2227 slew-rate = <1>;
2228 drive-push-pull;
2229 bias-disable;
2232 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
2233 slew-rate = <2>;
2234 drive-push-pull;
2235 bias-disable;
2239 /omit-if-no-ref/
2240 sdmmc2_b4_od_pins_b: sdmmc2-b4-od-1 {
2246 slew-rate = <1>;
2247 drive-push-pull;
2248 bias-disable;
2251 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
2252 slew-rate = <2>;
2253 drive-push-pull;
2254 bias-disable;
2257 pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
2258 slew-rate = <1>;
2259 drive-open-drain;
2260 bias-disable;
2264 /omit-if-no-ref/
2265 sdmmc2_b4_pins_c: sdmmc2-b4-2 {
2268 <STM32_PINMUX('B', 7, AF10)>, /* SDMMC2_D1 */
2271 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
2272 slew-rate = <1>;
2273 drive-push-pull;
2274 bias-pull-up;
2278 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
2279 slew-rate = <2>;
2280 drive-push-pull;
2281 bias-pull-up;
2285 /omit-if-no-ref/
2286 sdmmc2_b4_od_pins_c: sdmmc2-b4-od-2 {
2289 <STM32_PINMUX('B', 7, AF10)>, /* SDMMC2_D1 */
2292 slew-rate = <1>;
2293 drive-push-pull;
2294 bias-pull-up;
2298 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
2299 slew-rate = <2>;
2300 drive-push-pull;
2301 bias-pull-up;
2305 pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
2306 slew-rate = <1>;
2307 drive-open-drain;
2308 bias-pull-up;
2312 /omit-if-no-ref/
2313 sdmmc2_b4_sleep_pins_c: sdmmc2-b4-sleep-2 {
2316 <STM32_PINMUX('B', 7, ANALOG)>, /* SDMMC2_D1 */
2319 <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */
2320 <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */
2324 /omit-if-no-ref/
2325 sdmmc2_d47_pins_a: sdmmc2-d47-0 {
2329 <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
2331 slew-rate = <1>;
2332 drive-push-pull;
2333 bias-pull-up;
2337 /omit-if-no-ref/
2338 sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 {
2342 <STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC2_D6 */
2347 /omit-if-no-ref/
2348 sdmmc2_d47_pins_b: sdmmc2-d47-1 {
2352 <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
2353 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
2354 slew-rate = <1>;
2355 drive-push-pull;
2356 bias-disable;
2360 /omit-if-no-ref/
2361 sdmmc2_d47_sleep_pins_b: sdmmc2-d47-sleep-1 {
2365 <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
2366 <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
2370 /omit-if-no-ref/
2371 sdmmc2_d47_pins_c: sdmmc2-d47-2 {
2375 <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
2376 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
2377 slew-rate = <1>;
2378 drive-push-pull;
2379 bias-pull-up;
2383 /omit-if-no-ref/
2384 sdmmc2_d47_sleep_pins_c: sdmmc2-d47-sleep-2 {
2388 <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
2389 <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
2393 /omit-if-no-ref/
2394 sdmmc2_d47_pins_d: sdmmc2-d47-3 {
2398 <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
2399 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
2400 slew-rate = <1>;
2401 drive-push-pull;
2402 bias-pull-up;
2406 /omit-if-no-ref/
2407 sdmmc2_d47_sleep_pins_d: sdmmc2-d47-sleep-3 {
2411 <STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC2_D6 */
2412 <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
2416 /omit-if-no-ref/
2417 sdmmc2_d47_pins_e: sdmmc2-d47-4 {
2421 <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
2423 slew-rate = <1>;
2424 drive-push-pull;
2425 bias-pull-up;
2429 /omit-if-no-ref/
2430 sdmmc2_d47_sleep_pins_e: sdmmc2-d47-sleep-4 {
2434 <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
2439 /omit-if-no-ref/
2440 sdmmc3_b4_pins_a: sdmmc3-b4-0 {
2445 <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */
2447 slew-rate = <1>;
2448 drive-push-pull;
2449 bias-pull-up;
2453 slew-rate = <2>;
2454 drive-push-pull;
2455 bias-pull-up;
2459 /omit-if-no-ref/
2460 sdmmc3_b4_od_pins_a: sdmmc3-b4-od-0 {
2465 <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */
2466 slew-rate = <1>;
2467 drive-push-pull;
2468 bias-pull-up;
2472 slew-rate = <2>;
2473 drive-push-pull;
2474 bias-pull-up;
2478 slew-rate = <1>;
2479 drive-open-drain;
2480 bias-pull-up;
2484 /omit-if-no-ref/
2485 sdmmc3_b4_sleep_pins_a: sdmmc3-b4-sleep-0 {
2490 <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */
2496 /omit-if-no-ref/
2497 sdmmc3_b4_pins_b: sdmmc3-b4-1 {
2502 <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */
2504 slew-rate = <1>;
2505 drive-push-pull;
2506 bias-pull-up;
2510 slew-rate = <2>;
2511 drive-push-pull;
2512 bias-pull-up;
2516 /omit-if-no-ref/
2517 sdmmc3_b4_od_pins_b: sdmmc3-b4-od-1 {
2522 <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */
2523 slew-rate = <1>;
2524 drive-push-pull;
2525 bias-pull-up;
2529 slew-rate = <2>;
2530 drive-push-pull;
2531 bias-pull-up;
2535 slew-rate = <1>;
2536 drive-open-drain;
2537 bias-pull-up;
2541 /omit-if-no-ref/
2542 sdmmc3_b4_sleep_pins_b: sdmmc3-b4-sleep-1 {
2547 <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */
2553 /omit-if-no-ref/
2554 sdmmc3_b4_pins_c: sdmmc3-b4-2 {
2559 <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */
2561 slew-rate = <1>;
2562 drive-push-pull;
2563 bias-pull-up;
2568 slew-rate = <2>;
2569 drive-push-pull;
2570 bias-pull-up;
2574 /omit-if-no-ref/
2575 sdmmc3_b4_od_pins_c: sdmmc3-b4-od-2 {
2580 <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */
2581 slew-rate = <1>;
2582 drive-push-pull;
2583 bias-pull-up;
2588 slew-rate = <2>;
2589 drive-push-pull;
2590 bias-pull-up;
2595 slew-rate = <1>;
2596 drive-open-drain;
2597 bias-pull-up;
2601 /omit-if-no-ref/
2602 sdmmc3_b4_sleep_pins_c: sdmmc3-b4-sleep-2 {
2607 <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */
2613 /omit-if-no-ref/
2614 spdifrx_pins_a: spdifrx-0 {
2617 bias-disable;
2621 /omit-if-no-ref/
2622 spdifrx_sleep_pins_a: spdifrx-sleep-0 {
2628 /omit-if-no-ref/
2629 spi1_pins_b: spi1-1 {
2633 bias-disable;
2634 drive-push-pull;
2635 slew-rate = <1>;
2639 pinmux = <STM32_PINMUX('A', 6, AF5)>; /* SPI1_MISO */
2640 bias-disable;
2644 /omit-if-no-ref/
2645 spi2_pins_a: spi2-0 {
2649 bias-disable;
2650 drive-push-pull;
2651 slew-rate = <1>;
2656 bias-disable;
2660 /omit-if-no-ref/
2661 spi2_pins_b: spi2-1 {
2665 bias-disable;
2666 drive-push-pull;
2667 slew-rate = <1>;
2672 bias-disable;
2676 /omit-if-no-ref/
2677 spi2_pins_c: spi2-2 {
2681 bias-disable;
2682 drive-push-pull;
2687 bias-pull-down;
2691 /omit-if-no-ref/
2692 spi4_pins_a: spi4-0 {
2694 pinmux = <STM32_PINMUX('E', 12, AF5)>, /* SPI4_SCK */
2695 <STM32_PINMUX('E', 6, AF5)>; /* SPI4_MOSI */
2696 bias-disable;
2697 drive-push-pull;
2698 slew-rate = <1>;
2701 pinmux = <STM32_PINMUX('E', 13, AF5)>; /* SPI4_MISO */
2702 bias-disable;
2706 /omit-if-no-ref/
2707 spi5_pins_a: spi5-0 {
2709 pinmux = <STM32_PINMUX('F', 7, AF5)>, /* SPI5_SCK */
2711 bias-disable;
2712 drive-push-pull;
2713 slew-rate = <1>;
2718 bias-disable;
2722 /omit-if-no-ref/
2723 stusb1600_pins_a: stusb1600-0 {
2726 bias-pull-up;
2730 /omit-if-no-ref/
2731 uart4_pins_a: uart4-0 {
2734 bias-disable;
2735 drive-push-pull;
2736 slew-rate = <0>;
2740 bias-disable;
2744 /omit-if-no-ref/
2745 uart4_idle_pins_a: uart4-idle-0 {
2751 bias-disable;
2755 /omit-if-no-ref/
2756 uart4_sleep_pins_a: uart4-sleep-0 {
2763 /omit-if-no-ref/
2764 uart4_pins_b: uart4-1 {
2767 bias-disable;
2768 drive-push-pull;
2769 slew-rate = <0>;
2773 bias-disable;
2777 /omit-if-no-ref/
2778 uart4_pins_c: uart4-2 {
2781 bias-disable;
2782 drive-push-pull;
2783 slew-rate = <0>;
2787 bias-disable;
2791 /omit-if-no-ref/
2792 uart4_pins_d: uart4-3 {
2795 bias-disable;
2796 drive-push-pull;
2797 slew-rate = <0>;
2801 bias-disable;
2805 /omit-if-no-ref/
2806 uart4_idle_pins_d: uart4-idle-3 {
2812 bias-disable;
2816 /omit-if-no-ref/
2817 uart4_sleep_pins_d: uart4-sleep-3 {
2824 /omit-if-no-ref/
2825 uart4_pins_e: uart4-4 {
2828 bias-disable;
2829 drive-push-pull;
2830 slew-rate = <0>;
2835 bias-disable;
2839 /omit-if-no-ref/
2840 uart4_idle_pins_e: uart4-idle-4 {
2847 bias-disable;
2851 /omit-if-no-ref/
2852 uart4_sleep_pins_e: uart4-sleep-4 {
2859 /omit-if-no-ref/
2860 uart5_pins_a: uart5-0 {
2863 bias-disable;
2864 drive-push-pull;
2865 slew-rate = <0>;
2869 bias-disable;
2873 /omit-if-no-ref/
2874 uart7_pins_a: uart7-0 {
2876 pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
2877 bias-disable;
2878 drive-push-pull;
2879 slew-rate = <0>;
2882 pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART7_RX */
2883 <STM32_PINMUX('E', 10, AF7)>, /* UART7_CTS */
2884 <STM32_PINMUX('E', 9, AF7)>; /* UART7_RTS */
2885 bias-disable;
2889 /omit-if-no-ref/
2890 uart7_pins_b: uart7-1 {
2892 pinmux = <STM32_PINMUX('F', 7, AF7)>; /* UART7_TX */
2893 bias-disable;
2894 drive-push-pull;
2895 slew-rate = <0>;
2898 pinmux = <STM32_PINMUX('F', 6, AF7)>; /* UART7_RX */
2899 bias-disable;
2903 /omit-if-no-ref/
2904 uart7_pins_c: uart7-2 {
2906 pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
2907 bias-disable;
2908 drive-push-pull;
2909 slew-rate = <0>;
2912 pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */
2913 bias-pull-up;
2917 /omit-if-no-ref/
2918 uart7_idle_pins_c: uart7-idle-2 {
2920 pinmux = <STM32_PINMUX('E', 8, ANALOG)>; /* UART7_TX */
2923 pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */
2924 bias-pull-up;
2928 /omit-if-no-ref/
2929 uart7_sleep_pins_c: uart7-sleep-2 {
2931 pinmux = <STM32_PINMUX('E', 8, ANALOG)>, /* UART7_TX */
2932 <STM32_PINMUX('E', 7, ANALOG)>; /* UART7_RX */
2936 /omit-if-no-ref/
2937 uart7_pins_d: uart7-3 {
2939 pinmux = <STM32_PINMUX('F', 7, AF7)>, /* UART7_TX */
2941 bias-disable;
2942 drive-push-pull;
2943 slew-rate = <0>;
2947 pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART7_RX */
2949 bias-disable;
2953 /omit-if-no-ref/
2954 uart8_pins_a: uart8-0 {
2956 pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
2957 bias-disable;
2958 drive-push-pull;
2959 slew-rate = <0>;
2962 pinmux = <STM32_PINMUX('E', 0, AF8)>; /* UART8_RX */
2963 bias-disable;
2967 /omit-if-no-ref/
2968 uart8_rtscts_pins_a: uart8rtscts-0 {
2970 pinmux = <STM32_PINMUX('G', 7, AF8)>, /* UART8_RTS */
2972 bias-disable;
2976 /omit-if-no-ref/
2977 usart1_pins_a: usart1-0 {
2980 bias-disable;
2981 drive-push-pull;
2982 slew-rate = <0>;
2986 bias-disable;
2990 /omit-if-no-ref/
2991 usart1_idle_pins_a: usart1-idle-0 {
2998 /omit-if-no-ref/
2999 usart1_sleep_pins_a: usart1-sleep-0 {
3006 /omit-if-no-ref/
3007 usart2_pins_a: usart2-0 {
3011 bias-disable;
3012 drive-push-pull;
3013 slew-rate = <0>;
3016 pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
3018 bias-disable;
3022 /omit-if-no-ref/
3023 usart2_sleep_pins_a: usart2-sleep-0 {
3027 <STM32_PINMUX('D', 6, ANALOG)>, /* USART2_RX */
3032 /omit-if-no-ref/
3033 usart2_pins_b: usart2-1 {
3037 bias-disable;
3038 drive-push-pull;
3039 slew-rate = <0>;
3043 <STM32_PINMUX('E', 15, AF7)>; /* USART2_CTS_NSS */
3044 bias-disable;
3048 /omit-if-no-ref/
3049 usart2_sleep_pins_b: usart2-sleep-1 {
3054 <STM32_PINMUX('E', 15, ANALOG)>; /* USART2_CTS_NSS */
3058 /omit-if-no-ref/
3059 usart2_pins_c: usart2-2 {
3063 bias-disable;
3064 drive-push-pull;
3065 slew-rate = <0>;
3068 pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
3070 bias-disable;
3074 /omit-if-no-ref/
3075 usart2_idle_pins_c: usart2-idle-2 {
3082 bias-disable;
3083 drive-push-pull;
3084 slew-rate = <0>;
3087 pinmux = <STM32_PINMUX('D', 6, AF7)>; /* USART2_RX */
3088 bias-disable;
3092 /omit-if-no-ref/
3093 usart2_sleep_pins_c: usart2-sleep-2 {
3097 <STM32_PINMUX('D', 6, ANALOG)>, /* USART2_RX */
3102 /omit-if-no-ref/
3103 usart3_pins_a: usart3-0 {
3106 bias-disable;
3107 drive-push-pull;
3108 slew-rate = <0>;
3112 bias-disable;
3116 /omit-if-no-ref/
3117 usart3_idle_pins_a: usart3-idle-0 {
3123 bias-disable;
3127 /omit-if-no-ref/
3128 usart3_sleep_pins_a: usart3-sleep-0 {
3135 /omit-if-no-ref/
3136 usart3_pins_b: usart3-1 {
3140 bias-disable;
3141 drive-push-pull;
3142 slew-rate = <0>;
3147 bias-pull-up;
3151 /omit-if-no-ref/
3152 usart3_idle_pins_b: usart3-idle-1 {
3159 bias-disable;
3160 drive-push-pull;
3161 slew-rate = <0>;
3165 bias-pull-up;
3169 /omit-if-no-ref/
3170 usart3_sleep_pins_b: usart3-sleep-1 {
3179 /omit-if-no-ref/
3180 usart3_pins_c: usart3-2 {
3184 bias-disable;
3185 drive-push-pull;
3186 slew-rate = <0>;
3191 bias-pull-up;
3195 /omit-if-no-ref/
3196 usart3_idle_pins_c: usart3-idle-2 {
3203 bias-disable;
3204 drive-push-pull;
3205 slew-rate = <0>;
3209 bias-pull-up;
3213 /omit-if-no-ref/
3214 usart3_sleep_pins_c: usart3-sleep-2 {
3223 /omit-if-no-ref/
3224 usart3_pins_d: usart3-3 {
3228 bias-disable;
3229 drive-push-pull;
3230 slew-rate = <0>;
3235 bias-disable;
3239 /omit-if-no-ref/
3240 usart3_idle_pins_d: usart3-idle-3 {
3248 bias-disable;
3252 /omit-if-no-ref/
3253 usart3_sleep_pins_d: usart3-sleep-3 {
3262 /omit-if-no-ref/
3263 usart3_pins_e: usart3-4 {
3267 bias-disable;
3268 drive-push-pull;
3269 slew-rate = <0>;
3274 bias-pull-up;
3278 /omit-if-no-ref/
3279 usart3_idle_pins_e: usart3-idle-4 {
3286 bias-disable;
3287 drive-push-pull;
3288 slew-rate = <0>;
3292 bias-pull-up;
3296 /omit-if-no-ref/
3297 usart3_sleep_pins_e: usart3-sleep-4 {
3306 /omit-if-no-ref/
3307 usart3_pins_f: usart3-5 {
3311 bias-disable;
3312 drive-push-pull;
3313 slew-rate = <0>;
3318 bias-disable;
3322 /omit-if-no-ref/
3323 usbotg_hs_pins_a: usbotg-hs-0 {
3329 /omit-if-no-ref/
3330 usbotg_fs_dp_dm_pins_a: usbotg-fs-dp-dm-0 {
3339 /omit-if-no-ref/
3340 i2c2_pins_b2: i2c2-0 {
3343 bias-disable;
3344 drive-open-drain;
3345 slew-rate = <0>;
3349 /omit-if-no-ref/
3350 i2c2_sleep_pins_b2: i2c2-sleep-0 {
3356 /omit-if-no-ref/
3357 i2c4_pins_a: i2c4-0 {
3361 bias-disable;
3362 drive-open-drain;
3363 slew-rate = <0>;
3367 /omit-if-no-ref/
3368 i2c4_sleep_pins_a: i2c4-sleep-0 {
3375 /omit-if-no-ref/
3376 i2c6_pins_a: i2c6-0 {
3378 pinmux = <STM32_PINMUX('Z', 6, AF2)>, /* I2C6_SCL */
3379 <STM32_PINMUX('Z', 7, AF2)>; /* I2C6_SDA */
3380 bias-disable;
3381 drive-open-drain;
3382 slew-rate = <0>;
3386 /omit-if-no-ref/
3387 i2c6_sleep_pins_a: i2c6-sleep-0 {
3389 pinmux = <STM32_PINMUX('Z', 6, ANALOG)>, /* I2C6_SCL */
3390 <STM32_PINMUX('Z', 7, ANALOG)>; /* I2C6_SDA */
3394 /omit-if-no-ref/
3395 i2c6_pins_b: i2c6-1 {
3399 bias-disable;
3400 drive-open-drain;
3401 slew-rate = <0>;
3405 /omit-if-no-ref/
3406 i2c6_sleep_pins_b: i2c6-sleep-1 {
3413 /omit-if-no-ref/
3414 spi1_pins_a: spi1-0 {
3418 bias-disable;
3419 drive-push-pull;
3420 slew-rate = <1>;
3425 bias-disable;
3429 /omit-if-no-ref/
3430 spi1_sleep_pins_a: spi1-sleep-0 {
3438 /omit-if-no-ref/
3439 usart1_pins_b: usart1-1 {
3441 pinmux = <STM32_PINMUX('Z', 7, AF7)>; /* USART1_TX */
3442 bias-disable;
3443 drive-push-pull;
3444 slew-rate = <0>;
3447 pinmux = <STM32_PINMUX('Z', 6, AF7)>; /* USART1_RX */
3448 bias-disable;
3452 /omit-if-no-ref/
3453 usart1_idle_pins_b: usart1-idle-1 {
3455 pinmux = <STM32_PINMUX('Z', 7, ANALOG)>; /* USART1_TX */
3458 pinmux = <STM32_PINMUX('Z', 6, AF7)>; /* USART1_RX */
3459 bias-disable;
3463 /omit-if-no-ref/
3464 usart1_sleep_pins_b: usart1-sleep-1 {
3466 pinmux = <STM32_PINMUX('Z', 7, ANALOG)>, /* USART1_TX */
3467 <STM32_PINMUX('Z', 6, ANALOG)>; /* USART1_RX */