nxp/imx/imx6qdl.dtsi

11 	#address-cells = <1>;
12 	#size-cells = <1>;
77 		#address-cells = <1>;
84 			#address-cells = <1>;
97 			port@1 {
98 				reg = <1>;
106 		lvds-channel@1 {
107 			#address-cells = <1>;
109 			reg = <1>;
120 			port@1 {
121 				reg = <1>;
147 		#address-cells = <1>;
148 		#size-cells = <1>;
160 			#dma-cells = <1>;
193 				#address-cells = <1>;
204 				port@1 {
205 					reg = <1>;
240 			interrupts = <1 13 0xf01>;
245 		intc: interrupt-controller@a01000 {
265 		pcie: pcie@1ffc000 {
276 			num-lanes = <1>;
279 			#interrupt-cells = <1>;
281 			interrupt-map = <0 0 0 1 &gpc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
294 			#address-cells = <1>;
295 			#size-cells = <1>;
301 				#address-cells = <1>;
302 				#size-cells = <1>;
327 					#address-cells = <1>;
335 					dmas = <&sdma 3 7 1>, <&sdma 4 7 2>;
341 					#address-cells = <1>;
349 					dmas = <&sdma 5 7 1>, <&sdma 6 7 2>;
355 					#address-cells = <1>;
363 					dmas = <&sdma 7 7 1>, <&sdma 8 7 2>;
369 					#address-cells = <1>;
377 					dmas = <&sdma 9 7 1>, <&sdma 10 7 2>;
418 					dmas = <&sdma 37 1 0>,
419 					       <&sdma 38 1 0>;
434 					dmas = <&sdma 41 1 0>,
435 					       <&sdma 42 1 0>;
450 					dmas = <&sdma 45 1 0>,
451 					       <&sdma 46 1 0>;
473 					dmas = <&sdma 17 23 1>, <&sdma 18 23 1>, <&sdma 19 23 1>,
474 						<&sdma 20 23 1>, <&sdma 21 23 1>, <&sdma 22 23 1>;
497 				resets = <&src 1>;
686 				#clock-cells = <1>;
696 				reg_vdd1p1: regulator-1p1 {
753 					anatop-min-bit-val = <1>;
770 					anatop-min-bit-val = <1>;
787 					anatop-min-bit-val = <1>;
872 				#reset-cells = <1>;
886 					#address-cells = <1>;
893 					pd_pu: power-domain@1 {
894 						reg = <1>;
913 					#mux-control-cells = <1>;
946 			#address-cells = <1>;
947 			#size-cells = <1>;
953 				#address-cells = <1>;
954 				#size-cells = <1>;
999 				fsl,usbmisc = <&usbmisc 1>;
1038 				#index-cells = <1>;
1117 				#address-cells = <1>;
1127 				#address-cells = <1>;
1137 				#address-cells = <1>;
1164 				#size-cells = <1>;
1177 				#address-cells = <1>;
1178 				#size-cells = <1>;
1216 				#address-cells = <1>;
1231 					#address-cells = <1>;
1242 					port@1 {
1243 						reg = <1>;
1309 			#address-cells = <1>;
1329 			ipu1_csi1: port@1 {
1330 				reg = <1>;
1334 				#address-cells = <1>;
1342 				ipu1_di0_hdmi: endpoint@1 {
1343 					reg = <1>;
1364 				#address-cells = <1>;
1372 				ipu1_di1_hdmi: endpoint@1 {
1373 					reg = <1>;