dts/microchip/sama7d65.dtsi

1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3  *  sama7d65.dtsi - Device Tree Include file for SAMA7D65 SoC
11 #include <dt-bindings/clock/at91.h>
12 #include <dt-bindings/dma/at91.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/mfd/at91-usart.h>
21 	#address-cells = <1>;
22 	#size-cells = <1>;
23 	interrupt-parent = <&gic>;
26 		#address-cells = <1>;
27 		#size-cells = <0>;
30 			compatible = "arm,cortex-a7";
34 			clock-names = "cpu";
39 		main_xtal: clock-mainxtal {
40 			compatible = "fixed-clock";
41 			#clock-cells = <0>;
44 		slow_xtal: clock-slowxtal {
45 			compatible = "fixed-clock";
46 			#clock-cells = <0>;
51 		compatible = "simple-bus";
53 		#address-cells = <1>;
54 		#size-cells = <1>;
57 			compatible ="microchip,sama7d65-sfrbu", "atmel,sama5d2-sfrbu", "syscon";
62 			compatible = "microchip,sama7d65-pinctrl", "microchip,sama7g5-pinctrl";
70 			interrupt-controller;
71 			#interrupt-cells = <2>;
72 			gpio-controller;
73 			#gpio-cells = <2>;
76 		pmc: clock-controller@e0018000 {
77 			compatible = "microchip,sama7d65-pmc", "syscon";
80 			#clock-cells = <2>;
82 			clock-names = "td_slck", "md_slck", "main_xtal";
86 			compatible = "microchip,sama7d65-wdt", "microchip,sama7g5-wdt";
92 		reset_controller: reset-controller@e001d100 {
93 			compatible = "microchip,sama7d65-rstc", "microchip,sama7g5-rstc";
95 			#reset-cells = <1>;
100 			compatible = "microchip,sama7d65-shdwc", "microchip,sama7g5-shdwc", "syscon";
103 			#address-cells = <1>;
104 			#size-cells = <0>;
105 			atmel,wakeup-rtc-timer;
106 			atmel,wakeup-rtt-timer;
110 		clk32k: clock-controller@e001d500 {
111 			compatible = "microchip,sama7d65-sckc", "microchip,sam9x60-sckc";
114 			#clock-cells = <1>;
118 			compatible = "microchip,sama7d65-rtc", "microchip,sam9x60-rtc";
125 			compatible = "microchip,sama7d65-chipid";
129 		dma2: dma-controller@e1200000 {
130 			compatible = "microchip,sama7d65-dma", "microchip,sama7g5-dma";
133 			#dma-cells = <1>;
135 			clock-names = "dma_clk";
136 			dma-requests = <0>;
141 			compatible = "microchip,sama7d65-sdhci", "microchip,sam9x60-sdhci";
145 			clock-names = "hclock", "multclk";
146 			assigned-clocks = <&pmc PMC_TYPE_GCK 76>;
147 			assigned-clock-rates = <200000000>;
148 			assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_MCK1>;
152 		dma0: dma-controller@e1610000 {
153 			compatible = "microchip,sama7d65-dma", "microchip,sama7g5-dma";
156 			#dma-cells = <1>;
158 			clock-names = "dma_clk";
162 		dma1: dma-controller@e1614000 {
163 			compatible = "microchip,sama7d65-dma", "microchip,sama7g5-dma";
166 			#dma-cells = <1>;
168 			clock-names = "dma_clk";
173 			compatible = "microchip,sama7d65-pit64b", "microchip,sam9x60-pit64b";
177 			clock-names = "pclk", "gclk";
181 			compatible = "microchip,sama7d65-pit64b", "microchip,sam9x60-pit64b";
185 			clock-names = "pclk", "gclk";
189 			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
192 			#address-cells = <1>;
193 			#size-cells = <1>;
198 				compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";
202 				clock-names = "usart";
203 				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
204 				atmel,fifo-size = <16>;
210 			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
214 			#address-cells = <1>;
215 			#size-cells = <1>;
218 			i2c10: i2c@600 {
219 				compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
223 				#address-cells = <1>;
224 				#size-cells = <0>;
225 				atmel,fifo-size = <32>;
230 		gic: interrupt-controller@e8c11000 {
231 			compatible = "arm,cortex-a7-gic";
234 			#interrupt-cells = <3>;
235 			#address-cells = <0>;
236 			interrupt-controller;