Lines Matching +full:0 +full:x01c20c00
72 #size-cells = <0>;
74 cpu@0 {
77 reg = <0>;
102 #clock-cells = <0>;
110 #clock-cells = <0>;
126 reg = <0x01000000 0x10000>;
138 reg = <0x01100000 0x100000>;
139 clocks = <&display_clocks 0>,
143 resets = <&display_clocks 0>;
147 #size-cells = <0>;
162 reg = <0x01c00000 0xd0>;
173 reg = <0x01c000d0 0x0c>;
179 reg = <0x01c02000 0x1000>;
188 reg = <0x01c0c000 0x1000>;
195 #clock-cells = <0>;
202 #size-cells = <0>;
204 tcon0_in: port@0 {
205 reg = <0>;
214 #size-cells = <0>;
223 reg = <0x01c0f000 0x1000>;
236 pinctrl-0 = <&mmc0_pins>;
239 #size-cells = <0>;
244 reg = <0x01c10000 0x1000>;
257 pinctrl-0 = <&mmc1_pins>;
260 #size-cells = <0>;
265 reg = <0x01c11000 0x1000>;
279 #size-cells = <0>;
285 reg = <0x01c15000 0x1000>;
297 reg = <0x01c19000 0x0400>;
302 phys = <&usbphy 0>;
304 extcon = <&usbphy 0>;
310 reg = <0x01c19400 0x2c>,
311 <0x01c1a800 0x4>;
324 reg = <0x01c1a000 0x100>;
328 phys = <&usbphy 0>;
335 reg = <0x01c1a400 0x100>;
340 phys = <&usbphy 0>;
347 reg = <0x01c20000 0x400>;
357 reg = <0x01c20400 0x54>;
366 reg = <0x01c20800 0x400>;
466 reg = <0x01c20c00 0xa0>;
475 reg = <0x01c20ca0 0x20>;
483 reg = <0x01c21400 0xc>;
491 reg = <0x01c22800 0x400>;
497 #sound-dai-cells = <0>;
499 reg = <0x01c22c00 0x400>;
512 reg = <0x01c23000 0x4>;
517 reg = <0x01c28000 0x400>;
518 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
530 reg = <0x01c28400 0x400>;
543 reg = <0x01c28800 0x400>;
551 pinctrl-0 = <&uart2_pins>;
558 reg = <0x01c2ac00 0x400>;
563 pinctrl-0 = <&i2c0_pins>;
566 #size-cells = <0>;
571 reg = <0x01c2b000 0x400>;
577 #size-cells = <0>;
583 reg = <0x01c30000 0x10000>;
596 #size-cells = <0>;
603 #size-cells = <0>;
611 #size-cells = <0>;
625 reg = <0x01c68000 0x1000>;
632 pinctrl-0 = <&spi0_pins>;
636 #size-cells = <0>;
641 reg = <0x01c81000 0x1000>,
642 <0x01c82000 0x2000>,
643 <0x01c84000 0x2000>,
644 <0x01c86000 0x2000>;
652 reg = <0x01cb4000 0x3000>;