Lines Matching +full:timestamp +full:- +full:names
2 Coresight - HW Assisted Tracing on ARM
9 ------------
38 0 CPU 0<-->: C : 0 CPU 0<-->: C : : C : @ STM @ || System ||
39 |->0000000 : T : |->0000000 : T : : T :<--->@@@@@ || Memory ||
40 | #######<-->: I : | #######<-->: I : : I : @@@<-| ||||||||||||
43 | |->### | ! | |->### | ! | ! . | || DAP ||
49 *****************************************************************<-|
63 | * ===== F =====<---------|
65 |-->:: CTI ::<!! === N ===
69 |------>&& ETB &&<......II I =======
75 |------>& TPIU &<......II I DAP = Debug Access Port
84 all trace data are carried out-of-band on the ATB bus. The CTM provides
95 ---------------------------
111 TMC-ETR:
113 TMC-ETF:
123 Funnel, replicator (intelligent or not), TMC-ETR
125 ETBv1.0, ETB1.1, TPIU, TMC-ETF
131 --------------------
133 See ``Documentation/devicetree/bindings/arm/arm,coresight-*.yaml`` for details.
140 ----------------------------
190 drvdata->dev = &adev->dev;
201 --------------------
205 Thus the names were based on the Linux Open Firmware layer naming convention,
215 However, with the introduction of ACPI support, the names of the real
216 devices are a bit cryptic and non-obvious. Thus, a new naming scheme was
217 introduced to use more generic names based on the type of the device. The
227 <device_type_prefix> - A prefix specific to the type of the device
228 N - a sequential number assigned based on the order
241 system is not unexpected. One must use the "names" as they appear on
245 -----------------------
257 linaro-developer:~# ls - l /sys/bus/coresight/devices/etm0/connections
258 <file details> cti_cpu0 -> ../../../23020000.cti/cti_cpu0
260 <file details> out:0 -> ../../../230c0000.funnel/funnel2
264 linaro-developer:~# ls -l /sys/bus/coresight/devices/funnel2/connections
265 <file details> in:0 -> ../../../23040000.etm/etm0
266 <file details> in:1 -> ../../../23140000.etm/etm3
267 <file details> in:2 -> ../../../23240000.etm/etm4
268 <file details> in:3 -> ../../../23340000.etm/etm5
270 <file details> out:0 -> ../../../20040000.funnel/funnel0
274 linaro-developer:~# ls -l /sys/bus/coresight/devices/funnel0/connections
275 <file details> in:0 -> ../../../220c0000.funnel/funnel1
276 <file details> in:1 -> ../../../230c0000.funnel/funnel2
278 <file details> out:0 -> ../../../20010000.etf/tmc_etf0
283 linaro-developer:~# ls -l /sys/bus/coresight/devices/tmc_etf0/connections
284 <file details> cti_sys0 -> ../../../20020000.cti/cti_sys0
285 <file details> in:0 -> ../../../20040000.funnel/funnel0
287 <file details> out:0 -> ../../../20150000.funnel/funnel4
291 linaro-developer:~# ls -l /sys/bus/coresight/devices/funnel4/connections
292 <file details> in:0 -> ../../../20010000.etf/tmc_etf0
293 <file details> in:1 -> ../../../20140000.etf/tmc_etf1
295 <file details> out:0 -> ../../../20120000.replicator/replicator0
299 linaro-developer:~# ls -l /sys/bus/coresight/devices/replicator0/connections
300 <file details> in:0 -> ../../../20150000.funnel/funnel4
302 <file details> out:0 -> ../../../20030000.tpiu/tpiu0
303 <file details> out:1 -> ../../../20070000.etr/tmc_etr0
307 linaro-developer:~# ls -l /sys/bus/coresight/devices/tmc_etr0/connections
308 <file details> cti_sys0 -> ../../../20020000.cti/cti_sys0
309 <file details> in:0 -> ../../../20120000.replicator/replicator0
318 via the CTM. See (Documentation/trace/coresight/coresight-ect.rst)
322 linaro-developer:~# ls -l /sys/bus/coresight/devices/cti_sys0/connections
324 <file details> stm0 -> ../../../20100000.stm/stm0
325 <file details> tmc_etf0 -> ../../../20010000.etf/tmc_etf0
326 <file details> tmc_etr0 -> ../../../20070000.etr/tmc_etr0
327 <file details> tpiu0 -> ../../../20030000.tpiu/tpiu0
331 -----------------------------
372 RAM wrt ptr: 0x19d3 <----- The write pointer is moving
393 The file cstrace.bin can be decompressed using "ptm2human", DS-5 or Trace32.
395 Following is a DS-5 output of an experimental loop that increments a variable up
409 Instruction 0 0x8026B55C DAFFFFFA true BLE {pc}-0x10 ; 0x8026b54c
410 Timestamp Timestamp: 17106715833
415 Instruction 0 0x8026B55C DAFFFFFA true BLE {pc}-0x10 ; 0x8026b54c
420 Instruction 0 0x8026B55C DAFFFFFA true BLE {pc}-0x10 ; 0x8026b54c
425 Instruction 0 0x8026B55C DAFFFFFA true BLE {pc}-0x10 ; 0x8026b54c
430 Instruction 0 0x8026B55C DAFFFFFA true BLE {pc}-0x10 ; 0x8026b54c
435 Instruction 0 0x8026B55C DAFFFFFA true BLE {pc}-0x10 ; 0x8026b54c
448 Timestamp Timestamp: 17107041535
459 linaro@linaro-nano:~$ ./perf list pmu
461 List of pre-defined events (to be used in -e):
473 -----------------------------
488 root@linaro-nano:~# perf record -e cs_etm/@tmc_etr0/u --per-thread program
502 perf record -e cs_etm//u --per-thread
507 The --itrace option controls the type and frequency of synthesized events
510 Note that only 64-bit programs are currently supported - further work is
511 required to support instruction decode of 32-bit Arm programs.
539 automatically enable the "contextid" config - but for EL2 it is possible to make
544 perf record -e cs_etm/contextid1,contextid2/u -- vm
550 'perf inject' accepts the --itrace option in which case tracing data is
554 perf inject --itrace --strip -i perf.data -o perf.data.new
561 $ gcc-5 -O3 sort.c -o sort
562 $ taskset -c 2 ./sort
566 $ perf record -e cs_etm//u --per-thread taskset -c 2 ./sort
572 $ perf inject -i perf.data -o inj.data --itrace=il64 --strip
573 $ create_gcov --binary=./sort --profile=inj.data --gcov=sort.gcov -gcov_version=1
574 $ gcc-5 -O3 -fauto-profile=sort.gcov sort.c -o sort_autofdo
575 $ taskset -c 2 ./sort_autofdo
585 .. list-table::
586 :header-rows: 1
588 * - Option
589 - Description
590 * - branch_broadcast
591 - Session local version of the system wide setting:
592 :ref:`ETM_MODE_BB <coresight-branch-broadcast>`
593 * - contextid
594 - See `Tracing PID`_
595 * - contextid1
596 - See `Tracing PID`_
597 * - contextid2
598 - See `Tracing PID`_
599 * - configid
600 - Selection for a custom configuration. This is an implementation detail and not used directly,
601 see :ref:`trace/coresight/coresight-config:Using Configurations in perf`
602 * - preset
603 - Override for parameters in a custom configuration, see
604 :ref:`trace/coresight/coresight-config:Using Configurations in perf`
605 * - sinkid
606 - Hashed version of the string to select a sink, automatically set when using the @ notation.
609 * - cycacc
610 - Session local version of the system wide setting: :ref:`ETMv4_MODE_CYCACC
611 <coresight-cycle-accurate>`
612 * - retstack
613 - Session local version of the system wide setting: :ref:`ETM_MODE_RETURNSTACK
614 <coresight-return-stack>`
615 * - timestamp
616 - Session local version of the system wide setting: :ref:`ETMv4_MODE_TIMESTAMP
617 <coresight-timestamp>`
618 * - cc_threshold
619 - Cycle count threshold value. If nothing is provided here or the provided value is 0, then the
624 -------------------------
626 Using the System Trace Macrocell module is the same as the tracers - the only
647 root@genericarmv8:~# ls -l /dev/stm0
648 crw------- 1 root root 10, 61 Jan 3 18:11 /dev/stm0
652 - Documentation/trace/stm.rst [#second]_.
655 ---------------------
662 (Documentation/trace/coresight/coresight-ect.rst) [#fourth]_.
665 ------------------------------
675 (Documentation/trace/coresight/coresight-config.rst) [#fifth]_.
678 .. [#first] Documentation/ABI/testing/sysfs-bus-coresight-devices-stm
682 .. [#third] https://github.com/Linaro/perf-opencsd
684 .. [#fourth] Documentation/trace/coresight/coresight-ect.rst
686 .. [#fifth] Documentation/trace/coresight/coresight-config.rst