Documentation/iio/ad7191.rst

1 .. SPDX-License-Identifier: GPL-2.0-only
7 Device driver for Analog Devices AD7191 ADC.
14 The AD7191 is a high precision, low noise, 24-bit Σ-Δ ADC with integrated PGA.
22 -----------------
24 The driver supports both pin-strapped and GPIO-controlled configurations for ODR
26 configurations are mutually exclusive - you must use either pin-strapped or GPIO
32 The ODR can be configured either through GPIO control or pin-strapping:
34 - When using GPIO control, specify the "odr-gpios" property in the device tree
35 - For pin-strapped configuration, specify the "adi,odr-value" property in the
36   device tree
40   - 120 Hz (ODR1=0, ODR2=0)
41   - 60 Hz (ODR1=0, ODR2=1)
42   - 50 Hz (ODR1=1, ODR2=0)
43   - 10 Hz (ODR1=1, ODR2=1)
48 The PGA can be configured either through GPIO control or pin-strapping:
50 - When using GPIO control, specify the "pga-gpios" property in the device tree
51 - For pin-strapped configuration, specify the "adi,pga-value" property in the
52   device tree
56   - 1x (PGA1=0, PGA2=0)
57   - 8x (PGA1=0, PGA2=1)
58   - 64x (PGA1=1, PGA2=0)
59   - 128x (PGA1=1, PGA2=1)
62 -------------------
66 - When CLKSEL pin is tied LOW: Uses internal 4.92MHz clock (no clock property
68 - When CLKSEL pin is tied HIGH: Requires external clock source
69   - Can be a crystal between MCLK1 and MCLK2 pins
70   - Or a CMOS-compatible clock driving MCLK2 pin
71   - Must specify the "clocks" property in device tree when using external clock
74 --------------------------
78 - The DOUT/RDY output is dual-purpose and requires SPI bus locking
79 - DOUT/RDY must be connected to an interrupt-capable GPIO
80 - The SPI controller's chip select must be connected to the PDOWN pin of the ADC
81 - When CS (PDOWN) is high, the device powers down and resets internal circuitry
82 - SPI mode 3 operation (CPOL=1, CPHA=1) is required
85 -------------------------
87 The device requires the following power supplies:
89 - AVdd: Analog power supply
90 - DVdd: Digital power supply
91 - Vref: Reference voltage supply (external)
93 All power supplies must be specified in the device tree.
98 The device provides three channels:
101    - 24-bit unsigned
102    - Internal temperature measurement
103    - Temperature in millidegrees Celsius
105 2. Differential Input (AIN1-AIN2)
106    - 24-bit unsigned
107    - Differential voltage measurement
108    - Configurable gain via PGA
110 3. Differential Input (AIN3-AIN4)
111    - 24-bit unsigned
112    - Differential voltage measurement
113    - Configurable gain via PGA