Lines Matching +full:sdi +full:- +full:enabled

1 .. SPDX-License-Identifier: GPL-2.0-only
26 ----------------
30 4-wire mode
35 .. code-block::
37 +-------------+ +-------------+
38 | CS |<-+------| CS |
39 | CNV |<-+ | |
42 | SDI |<--------| SDO |
43 | SDO |-------->| SDI |
44 | SCLK |<--------| SCLK |
45 +-------------+ +-------------+
47 To use this mode, in the device tree, omit the ``cnv-gpios`` and
48 ``spi-rx-bus-width`` properties.
55 .. code-block::
57 +-------------+ +-------------+
58 | GP0/BUSY |-------->| TRIGGER |
59 | CS |<--------| CS |
63 | SDI |<--------| SDO |
64 | SDO |-------->| SDI |
65 | SCLK |<--------| SCLK |
67 | | +-------------+
68 | CNV |<-----+--| PWM |
69 | | +--| GPIO |
70 +-------------+ +-------------+
72 In this case, both the ``cnv-gpios`` and ``pwms`` properties are required.
73 The ``#trigger-source-cells = <2>`` property is also required to connect back
74 to the SPI offload. The SPI offload will have ``trigger-sources`` property
81 ---------------------
94 Each ``INx`` pin can be used as a pseudo-differential input in conjunction with
97 .. code-block::
103 If no other channel properties are needed (e.g. ``adi,no-high-z``), the channel
113 Each ``INx`` pin can be used as a pseudo-differential input in conjunction with
116 .. code-block::
118 com-supply = <&vref_div_2>;
122 common-mode-channel = <AD4695_COMMON_MODE_COM>;
128 relative to ``REFGND``. (The offset is determined by the ``com-supply`` voltage.)
132 .. code-block::
134 #include <dt-bindings/iio/adc/adi,ad4695.h>
139 An even-numbered ``INx`` pin and the following odd-numbered ``INx`` pin can be
140 used as a pseudo-differential input. The device tree for using ``IN2`` as the
143 .. code-block::
145 in3-supply = <&vref_div_2>;
149 common-mode-channel = <3>; /* IN3 */
155 relative to ``REFGND``. (Offset is determined by the ``in3-supply`` voltage.)
158 ----------
162 determine which is being used. If ``ldo-supply`` is present, then the internal
163 LDO is used. If ``vcc-supply`` is present, then the external LDO is used and
167 -----------------
171 at the device tree to determine which is being used. If ``ref-supply`` is
173 disabled. If ``refin-supply`` is present, then the internal buffered reference
177 -----------------------
183 ------------
185 The chip supports per-channel oversampling when SPI offload is being used, with
210 ----------------------
212 - Additional wiring modes
213 - Threshold events
214 - GPIO support
215 - CRC support
247 ----------------------------------------
250 is manually configured in userspace. All enabled channels will be read in a
257 the sum of the periods of each enabled channel in a buffered read. In other
259 divided by the number of enabled channels. So if 4 channels are enabled, with
263 With oversampling enabled, the effective sample rate also depends on the OSR
268 that in this case "sample" refers to one read of all enabled channels (i.e. one
269 full cycle through the auto-sequencer).