Lines Matching +full:always +full:- +full:wait +full:- +full:for +full:- +full:ack
6 -----------
12 ------------
14 The SoundWire 1.x specification provides a mechanism to speed-up
28 10-byte overhead per frame (header and footer response).
36 Port 0, and likewise the Manager SHALL expose audio-like Ports
41 bandwidth. If there are no on-going audio transfers, the entire
42 frame minus Column 0 can be reclaimed for BRA. The frame shape
43 also impacts efficiency: since Column0 cannot be used for
61 need to be spaced in time or flow-controlled.
64 to be transmitted. This allows for software to allocate a BRA
73 the paging registers used for the regular command/control
78 --------------
84 (1) A CRC on the 7-byte header. This CRC helps the Peripheral Device
89 transmitted as the last-but-one byte in the packet, prior to the
93 (a) Ack
98 (1) Ack
104 -------------
107 for clarity. The different chunks in the BRA packets are not required
112 +---+--------------------------------------------+
116 + +--------------------------------------------+
118 + O +--------------------------------------------+
120 + M +--------------------------------------------+
127 + +--------------------------------------------+
129 + +--------------------------------------------+
131 +---+--------------------------------------------+
137 - HSTART = 1
138 - HSTOP = N - 1
139 - Sampling Interval = N
140 - WordLength = N - 1
143 -----------------------
146 definitions, and broadcast and group addressing are permitted. For now
147 the Linux implementation only allows for a single BPT transfer to a
150 this would only be beneficial for single-link solutions.
155 streams, possibly in parallel - the links are really independent.
158 --------------------
164 always the Manager Device.
166 (2) Flow-control capabilities and retransmission based on the
170 Bi-directional handling
171 -----------------------
176 by a single DP0 data port, and at the low-level the bus ownership can
177 will change for header/footer response as well as the data transmitted
180 On the host side, most implementations rely on a Port-like concept,
182 (Host->Peripheral and Peripheral->Host). The amount of data
194 transmitted, and the error status for each frame
197 retry a transfer in case of errors. However, as for the flow-control
206 Manager level, so the low-level BPT/BRA details must be hidden in
207 Manager-specific code. For example the Cadence IP format above is not
212 Manager-specific code.
214 The host BRA driver may also have restrictions on pages allocated for
215 DMA, or other host-DSP communication protocols. The codec driver
227 mutex for regular read/write and BRA is a show-stopper. Independent
234 In addition, the 'sdw_msg' structure hard-codes support for 16-bit
235 addresses and paging registers which are irrelevant for BPT/BRA
236 support based on native 32-bit addresses. A separate API with
239 One possible strategy to speed-up all initialization tasks would be to
240 start a BRA transfer for firmware download, then deal with all the
242 to wait for the BRA transfers to complete. This would allow for a
244 the BRA API must support async transfers and expose a separate wait
249 ------------------------
251 The bus interface for BPT/BRA is made of two functions:
253 - sdw_bpt_send_async(bpt_message)
256 implementation-defined capabilities (typically DMA or IPC
260 needs to wait for completion of the requested transfer.
262 - sdw_bpt_wait()
264 This function waits for the entire message provided by the
265 codec driver in the 'send_async' stage. Intermediate status for
274 send/wait API suggested above, so at a high-level it would seem
276 is available or not, and use a regular read-write command channel in
282 ----------------
284 For regular audio transfers, the machine driver exposes a dailink
289 (1) The SoundWire DAIs are mainly wrappers for SoundWire Data
297 COMMAND_IGNORED responses that will be wired-ORed with
303 (2) At the CPU level, the DAI concept is not useful for BRA; the
316 concept of multi-link aggregation allowed by regular DAI links.
319 -----------------
328 transfer. The format is based on 192kHz 32-bit samples, and the number
335 but at the platform-level, e.g. for Intel the data sizes must be