Documentation/driver-api/mtdnand.rst

10 The generic NAND driver supports almost all NAND and AG-AND based chips
26 struct member has a short description which is marked with an [XXX]
31 --------------------------
37 -  [MTD Interface]
43 -  [NAND Interface]
48 -  [GENERIC]
53 -  [DEFAULT]
65 -------------------------------
71 -  [INTERN]
77 -  [REPLACEABLE]
86 -  [BOARDSPECIFIC]
92 -  [OPTIONAL]
105 -------------
131 -----------------
150 -------------------------
183             case NAND_CTL_SETCLE: this->legacy.IO_ADDR_W |= CLE_ADRR_BIT;  break;
184             case NAND_CTL_CLRCLE: this->legacy.IO_ADDR_W &= ~CLE_ADRR_BIT; break;
185             case NAND_CTL_SETALE: this->legacy.IO_ADDR_W |= ALE_ADRR_BIT;  break;
186             case NAND_CTL_CLRALE: this->legacy.IO_ADDR_W &= ~ALE_ADRR_BIT; break;
192 ---------------------
194 If the hardware interface has the ready busy pin of the NAND chip
196 to read back the state of the pin. The function has no arguments and
200 and the function pointer this->legacy.dev_ready is set to NULL.
203 -------------
223             err = -ENOMEM;
233             err = -EIO;
238         this->legacy.IO_ADDR_R = baseaddr;
239         this->legacy.IO_ADDR_W = baseaddr;
241         this->hwcontrol = board_hwcontrol;
243         this->legacy.chip_delay = CHIP_DEPENDEND_COMMAND_DELAY;
245         this->legacy.dev_ready = board_dev_ready;
246         this->eccmode = NAND_ECC_SOFT;
250             err = -ENXIO;
268 -------------
302 ---------------------
341         this->legacy.IO_ADDR_R &= ~BOARD_NAND_ADDR_MASK;
342         this->legacy.IO_ADDR_W &= ~BOARD_NAND_ADDR_MASK;
345             this->legacy.IO_ADDR_R |= BOARD_NAND_ADDR_CHIP0;
346             this->legacy.IO_ADDR_W |= BOARD_NAND_ADDR_CHIP0;
350             this->legacy.IO_ADDR_R |= BOARD_NAND_ADDR_CHIPn;
351             this->legacy.IO_ADDR_W |= BOARD_NAND_ADDR_CHIPn;
357 Hardware ECC support
358 --------------------
363 The nand driver supports three different types of hardware ECC.
365 -  NAND_ECC_HW3_256
367    Hardware ECC generator providing 3 bytes ECC per 256 byte.
369 -  NAND_ECC_HW3_512
371    Hardware ECC generator providing 3 bytes ECC per 512 byte.
373 -  NAND_ECC_HW6_512
375    Hardware ECC generator providing 6 bytes ECC per 512 byte.
377 -  NAND_ECC_HW8_512
379    Hardware ECC generator providing 8 bytes ECC per 512 byte.
381 If your hardware generator has a different functionality add it at the
386 -  enable_hwecc
393 -  calculate_ecc
396    Transfer the ECC from the hardware to the buffer. If the option
400 -  correct_data
402    In case of an ECC error this function is called for error detection
404    corrected. If the error is not correctable return -1. If your
409 Hardware ECC with syndrome calculation
412 Many hardware ECC implementations provide Reed-Solomon codes and
414 standard Reed-Solomon syndrome before calling the error correction code
415 in the generic Reed-Solomon library.
417 The ECC bytes must be placed immediately after the data bytes in order
419 layout used by software ECC. The separation of data and out of band area
422 code. Provide a matching oob-layout in this case. See rts_from4.c and
424 use bad block tables on FLASH, because the ECC layout is interfering
429 -----------------------
440 -  Per device
445 -  Per chip
450 -  Fixed offset
455 -  Automatic placed
460 -  Mirrored tables
478 AG-AND chips this is mandatory, as they have no factory marked bad
493 nand chip structure before calling nand_scan(). For AG-AND chips is
498 -  Store bad block table per chip
500 -  Use 2 bits per block
502 -  Automatic placement at the end of the chip
504 -  Use mirrored tables with version numbers
506 -  Reserve 4 blocks at the end of the chip
523 -  Number of bits per block
527 -  Table per chip
533 -  Table location is absolute
542 -  Table location is automatically detected
550    the pattern has to be stored in len and the offset in the spare area
554 -  Table creation
560 -  Table write support
563    This allows the update of the bad block table(s) in case a block has
571 -  Table version control
582 -  Save block contents on write
591 -  Number of reserved blocks
601 --------------------------
606 -  Placement defined by fs driver
608 -  Automatic placement
611 has built in default placement schemes for the various chiptypes. If due
612 to hardware ECC functionality the default placement does not fit then
630 -  useecc
632    The useecc member controls the ecc and placement function. The header
633    file include/mtd/mtd-abi.h contains constants to select ecc and
634    placement. MTD_NANDECC_OFF switches off the ecc complete. This is
639 -  eccbytes
641    The eccbytes member defines the number of ecc bytes per page.
643 -  eccpos
646    ecc codes are placed.
648 -  oobfree
660 which defines the ecc placement. For writes the caller must provide a
663 is (number of pages) \* ((size of spare area) + (number of ecc steps per
664 page) \* sizeof (int)). The driver stores the result of the ecc check
667 	<spare data page 0><ecc result 0>...<ecc result n>
671 	<spare data page n><ecc result 0>...<ecc result n>
675 If the spare area buffer is NULL then only the ECC placement is done
681 Automatic placement uses the built in defaults to place the ecc bytes in
687 If the spare area buffer is NULL then only the ECC placement is done
691 ----------------------------------------
699 0x00     ECC byte 0         Error correction code byte 0
700 0x01     ECC byte 1         Error correction code byte 1
701 0x02     ECC byte 2         Error correction code byte 2
719 0x00          ECC byte 0         Error correction code byte 0 of the lower
721 0x01          ECC byte 1         Error correction code byte 1 of the lower
723 0x02          ECC byte 2         Error correction code byte 2 of the lower
725 0x03          ECC byte 3         Error correction code byte 0 of the upper
732 0x06          ECC byte 4         Error correction code byte 1 of the upper
734 0x07          ECC byte 5         Error correction code byte 2 of the upper
736 0x08 - 0x0F   Autoplace 0 - 7
750 0x02-0x27   Autoplace 0 - 37
751 0x28        ECC byte 0         Error correction code byte 0 of the first
753 0x29        ECC byte 1         Error correction code byte 1 of the first
755 0x2A        ECC byte 2         Error correction code byte 2 of the first
757 0x2B        ECC byte 3         Error correction code byte 0 of the second
759 0x2C        ECC byte 4         Error correction code byte 1 of the second
761 0x2D        ECC byte 5         Error correction code byte 2 of the second
763 0x2E        ECC byte 6         Error correction code byte 0 of the third
765 0x2F        ECC byte 7         Error correction code byte 1 of the third
767 0x30        ECC byte 8         Error correction code byte 2 of the third
769 0x31        ECC byte 9         Error correction code byte 0 of the fourth
771 0x32        ECC byte 10        Error correction code byte 1 of the fourth
773 0x33        ECC byte 11        Error correction code byte 2 of the fourth
775 0x34        ECC byte 12        Error correction code byte 0 of the fifth
777 0x35        ECC byte 13        Error correction code byte 1 of the fifth
779 0x36        ECC byte 14        Error correction code byte 2 of the fifth
781 0x37        ECC byte 15        Error correction code byte 0 of the sixth
783 0x38        ECC byte 16        Error correction code byte 1 of the sixth
785 0x39        ECC byte 17        Error correction code byte 2 of the sixth
787 0x3A        ECC byte 18        Error correction code byte 0 of the seventh
789 0x3B        ECC byte 19        Error correction code byte 1 of the seventh
791 0x3C        ECC byte 20        Error correction code byte 2 of the seventh
793 0x3D        ECC byte 21        Error correction code byte 0 of the eighth
795 0x3E        ECC byte 22        Error correction code byte 1 of the eighth
797 0x3F        ECC byte 23        Error correction code byte 2 of the eighth
810 it again, are restricted to 1-3 writes, depending on the manufacturers
826 -  flasherase, flasheraseall: Erase and format FLASH partitions
828 -  nandwrite: write filesystem images to NAND FLASH
830 -  nanddump: dump the contents of a NAND FLASH partitions
843 ---------------------
848 These constants are defined in rawnand.h. They are OR-ed together to
855     /* Chip has cache program function */
857     /* Chip has copy back function */
859     /* AND Chip which has 4 banks and a confusing page / block
862     /* Chip has a array of 4 pages which can be read without
870 These constants are defined in rawnand.h. They are OR-ed together to
873     /* The hw ecc generator provides a syndrome instead a ecc value on read
874      * This can only work if we have the ecc bytes directly behind the
875      * data bytes. Applies for DOC and AG-AND Renesas HW Reed Solomon generators */
879 ECC selection constants
880 -----------------------
882 Use these constants to select the ECC algorithm::
884     /* No ECC. Usage is not recommended ! */
886     /* Software ECC 3 byte ECC per 256 Byte data */
888     /* Hardware ECC 3 byte ECC per 256 Byte data */
890     /* Hardware ECC 3 byte ECC per 512 Byte data */
892     /* Hardware ECC 6 byte ECC per 512 Byte data */
894     /* Hardware ECC 8 byte ECC per 512 Byte data */
899 ----------------------------------
923 ---------------------------------
942     /* bbt has a version counter at offset veroffs */
957 developer. Each struct member has a short description which is marked
961 .. kernel-doc:: include/linux/mtd/rawnand.h
968 API functions which are exported. Each function has a short description
972 .. kernel-doc:: drivers/mtd/nand/raw/nand_base.c
979 internal functions. Each function has a short description which is
984 .. kernel-doc:: drivers/mtd/nand/raw/nand_base.c
987 .. kernel-doc:: drivers/mtd/nand/raw/nand_bbt.c