bindings/spi/spi-fsl-lpspi.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-fsl-lpspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale Low Power SPI (LPSPI) for i.MX
10   - Shawn Guo <shawnguo@kernel.org>
11   - Sascha Hauer <s.hauer@pengutronix.de>
12   - Fabio Estevam <festevam@gmail.com>
15   - $ref: /schemas/spi/spi-controller.yaml#
20       - enum:
21           - fsl,imx7ulp-spi
22           - fsl,imx8qxp-spi
23       - items:
24           - enum:
25               - fsl,imx8ulp-spi
26               - fsl,imx93-spi
27               - fsl,imx94-spi
28               - fsl,imx95-spi
29           - const: fsl,imx7ulp-spi
38       - description: SoC SPI per clock
39       - description: SoC SPI ipg clock
41   clock-names:
43       - const: per
44       - const: ipg
48       - description: TX DMA Channel
49       - description: RX DMA Channel
51   dma-names:
53       - const: tx
54       - const: rx
56   fsl,spi-only-use-cs1-sel:
58       spi common code does not support use of CS signals discontinuously.
59       i.MX8DXL-EVK board only uses CS1 without using CS0. Therefore, add
60       this property to re-config the chipselect value in the LPSPI driver.
63   num-cs:
70   power-domains:
74   - compatible
75   - reg
76   - interrupts
77   - clocks
78   - clock-names
83   - |
84     #include <dt-bindings/clock/imx7ulp-clock.h>
85     #include <dt-bindings/interrupt-controller/arm-gic.h>
87     spi@40290000 {
88         compatible = "fsl,imx7ulp-spi";
90         interrupt-parent = <&intc>;
94         clock-names = "per", "ipg";
95         spi-slave;
96         fsl,spi-only-use-cs1-sel;
97         num-cs = <2>;