soc/qcom/qcom%2Cgeni-se.yaml

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,geni-se.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Bjorn Andersson <bjorn.andersson@linaro.org>
23       - qcom,geni-se-qup
24       - qcom,geni-se-i2c-master-hub
30   clock-names:
38   "#address-cells":
41   "#size-cells":
49   interconnect-names:
50     const: qup-core
55   dma-coherent: true
57   firmware-name:
62   - compatible
63   - reg
64   - clock-names
65   - clocks
66   - "#address-cells"
67   - "#size-cells"
68   - ranges
71   "spi@[0-9a-f]+$":
77     $ref: /schemas/spi/qcom,spi-geni-qcom.yaml#
79   "i2c@[0-9a-f]+$":
82     $ref: /schemas/i2c/qcom,i2c-geni-qcom.yaml#
84   "serial@[0-9a-f]+$":
87     $ref: /schemas/serial/qcom,serial-geni-qcom.yaml#
90   - if:
94             const: qcom,geni-se-i2c-master-hub
97         clock-names:
99             - const: s-ahb
103             - description: Slave AHB Clock
108         "spi@[0-9a-f]+$": false
109         "serial@[0-9a-f]+$": false
112         clock-names:
114             - const: m-ahb
115             - const: s-ahb
119             - description: Master AHB Clock
120             - description: Slave AHB Clock
125   - |
126     #include <dt-bindings/clock/qcom,gcc-sdm845.h>
127     #include <dt-bindings/interrupt-controller/arm-gic.h>
130         #address-cells = <2>;
131         #size-cells = <2>;
134             compatible = "qcom,geni-se-qup";
136             clock-names = "m-ahb", "s-ahb";
137             clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
138                 <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
139             #address-cells = <2>;
140             #size-cells = <2>;
142             firmware-name = "qcom/sa8775p/qupv3fw.elf";
145                 compatible = "qcom,geni-i2c";
148                 clock-names = "se";
149                 clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
150                 pinctrl-names = "default", "sleep";
151                 pinctrl-0 = <&qup_1_i2c_5_active>;
152                 pinctrl-1 = <&qup_1_i2c_5_sleep>;
153                 #address-cells = <1>;
154                 #size-cells = <0>;
158                 compatible = "qcom,geni-uart";
161                 clock-names = "se";
162                 clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
163                 pinctrl-names = "default", "sleep";
164                 pinctrl-0 = <&qup_1_uart_3_active>;
165                 pinctrl-1 = <&qup_1_uart_3_sleep>;