bindings/net/nxp%2Cdwmac-imx.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/nxp,dwmac-imx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Clark Wang <xiaoning.wang@nxp.com>
11   - Shawn Guo <shawnguo@kernel.org>
12   - NXP Linux Team <linux-imx@nxp.com>
20           - nxp,imx8mp-dwmac-eqos
21           - nxp,imx8dxl-dwmac-eqos
22           - nxp,imx93-dwmac-eqos
24     - compatible
27   - $ref: snps,dwmac.yaml#
32       - items:
33           - enum:
34               - nxp,imx8mp-dwmac-eqos
35               - nxp,imx8dxl-dwmac-eqos
36               - nxp,imx93-dwmac-eqos
37           - const: snps,dwmac-5.10a
42       - description: MAC host clock
43       - description: MAC apb clock
44       - description: MAC timer clock
45       - description: MAC RGMII TX clock
46       - description: EQOS MEM clock
48   clock-names:
53         - stmmaceth
54         - pclk
55         - ptp_ref
56         - tx
57         - mem
62   interrupt-names:
64       - const: macirq
65       - const: eth_wake_irq
68     $ref: /schemas/types.yaml#/definitions/phandle-array
70       - items:
71           - description: phandle to the GPR syscon
72           - description: the offset of the GPR register
77   nvmem-cells: true
79   nvmem-cell-names: true
87   - compatible
88   - clocks
89   - clock-names
94   - |
95     #include <dt-bindings/interrupt-controller/arm-gic.h>
96     #include <dt-bindings/interrupt-controller/irq.h>
97     #include <dt-bindings/clock/imx8mp-clock.h>
100             compatible = "nxp,imx8mp-dwmac-eqos","snps,dwmac-5.10a";
104             interrupt-names = "macirq", "eth_wake_irq";
105             clocks = <&clk IMX8MP_CLK_ENET_QOS_ROOT>,
106                      <&clk IMX8MP_CLK_QOS_ENET_ROOT>,
107                      <&clk IMX8MP_CLK_ENET_QOS_TIMER>,
108                      <&clk IMX8MP_CLK_ENET_QOS>;
109             clock-names = "stmmaceth", "pclk", "ptp_ref", "tx";
110             phy-mode = "rgmii";