bindings/memory-controllers/qcom%2Cebi2-peripheral-props.yaml

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/qcom,ebi2-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Bjorn Andersson <andersson@kernel.org>
14   qcom,xmem-recovery-cycles:
18       is de-asserted, in order to avoid contention on the data bus.
20       CS or read followed by write on the same CS. Minimum value is
25   qcom,xmem-write-hold-cycles:
28       The extra cycles inserted after every write minimum 1. The
35   qcom,xmem-write-delta-cycles:
38       The initial latency for write cycles inserted for the first
43   qcom,xmem-read-delta-cycles:
46       The initial latency for read cycles inserted for the first
47       read to a page or burst memory.
51   qcom,xmem-write-wait-cycles:
54       The number of wait cycles for every write access.
58   qcom,xmem-read-wait-cycles:
61       The number of wait cycles for every read access.
67   qcom,xmem-address-hold-enable:
74   qcom,xmem-adv-to-oe-recovery-cycles:
77       The number of cycles elapsed before an OE assertion, with
82   qcom,xmem-read-hold-cycles:
85       The length in cycles of the first segment of a read transfer.
86       For a single read transfer this will be the time from CS