bindings/media/mediatek%2Cvcodec-encoder.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/mediatek,vcodec-encoder.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Yunfei Dong <yunfei.dong@mediatek.com>
19       - items:
20           - enum:
21               - mediatek,mt8173-vcodec-enc-vp8
22               - mediatek,mt8173-vcodec-enc
23               - mediatek,mt8183-vcodec-enc
24               - mediatek,mt8188-vcodec-enc
25               - mediatek,mt8192-vcodec-enc
26               - mediatek,mt8195-vcodec-enc
27       - items:
28           - const: mediatek,mt8186-vcodec-enc
29           - const: mediatek,mt8183-vcodec-enc
40   clock-names:
61   power-domains:
64   "#address-cells":
67   "#size-cells":
71   - compatible
72   - reg
73   - interrupts
74   - clocks
75   - clock-names
76   - iommus
79   - if:
84               - mediatek,mt8183-vcodec-enc
85               - mediatek,mt8188-vcodec-enc
86               - mediatek,mt8192-vcodec-enc
87               - mediatek,mt8195-vcodec-enc
91         - mediatek,scp
93   - if:
98               - mediatek,mt8173-vcodec-enc-vp8
99               - mediatek,mt8173-vcodec-enc
103         - mediatek,vpu
105   - if:
109             - mediatek,mt8173-vcodec-enc-vp8
117         clock-names:
119             - const: venc_lt_sel
126         clock-names:
128             - const: venc_sel
133   - |
134     #include <dt-bindings/interrupt-controller/arm-gic.h>
135     #include <dt-bindings/clock/mt8173-clk.h>
136     #include <dt-bindings/memory/mt8173-larb-port.h>
137     #include <dt-bindings/interrupt-controller/irq.h>
139     vcodec_enc_avc: vcodec@18002000 {
140       compatible = "mediatek,mt8173-vcodec-enc";
156       clock-names = "venc_sel";
157       assigned-clocks = <&topckgen CLK_TOP_VENC_SEL>;
158       assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL>;
161     vcodec_enc_vp8: vcodec@19002000 {
162       compatible = "mediatek,mt8173-vcodec-enc-vp8";
176       clock-names = "venc_lt_sel";
177       assigned-clocks = <&topckgen CLK_TOP_VENC_LT_SEL>;
178       assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL_370P5>;