bindings/i2c/snps%2Cdesignware-i2c.yaml

1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/i2c/snps,designware-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Jarkko Nikula <jarkko.nikula@linux.intel.com>
13   - $ref: /schemas/i2c/i2c-controller.yaml#
14   - if:
19               const: mscc,ocelot-i2c
28       - description: Generic Synopsys DesignWare I2C controller
29         const: snps,designware-i2c
30       - description: Renesas RZ/N1D I2C controller
32           - const: renesas,r9a06g032-i2c  # RZ/N1D
33           - const: renesas,rzn1-i2c       # RZ/N1
34           - const: snps,designware-i2c
35       - description: Microsemi Ocelot SoCs I2C controller
37           - const: mscc,ocelot-i2c
38           - const: snps,designware-i2c
39       - description: Baikal-T1 SoC System I2C controller
40         const: baikal,bt1-sys-i2c
41       - description: T-HEAD TH1520 SoCs I2C controller
43           - const: thead,th1520-i2c
44           - const: snps,designware-i2c
49       - description: DW APB I2C controller memory mapped registers
50       - description: |
52           This registers are specific to the Ocelot I2C-controller.
60       - description: I2C controller reference clock source
61       - description: APB interface clock source
63   clock-names:
66       - const: ref
67       - const: pclk
72   clock-frequency:
73     description: Desired I2C bus clock frequency in Hz
77   i2c-sda-hold-time-ns:
83   i2c-scl-falling-time-ns:
86       This value is used to compute the tLOW period.
89   i2c-sda-falling-time-ns:
92       This value is used to compute the tHIGH period.
97       - description: TX DMA Channel
98       - description: RX DMA Channel
100   dma-names:
102       - const: tx
103       - const: rx
105   snps,bus-capacitance-pf:
106     $ref: /schemas/types.yaml#/definitions/uint32
114   snps,clk-freq-optimized:
116       This property indicates whether the hardware reduce its clock frequency
117       by reducing the internal latency required to generate the high period and
118       low period of SCL line.
124   - compatible
125   - reg
126   - interrupts
129   - |
131       compatible = "snps,designware-i2c";
134       clock-frequency = <400000>;
136   - |
138       compatible = "snps,designware-i2c";
141       clock-frequency = <400000>;
142       i2c-sda-hold-time-ns = <300>;
143       i2c-sda-falling-time-ns = <300>;
144       i2c-scl-falling-time-ns = <300>;
145       snps,bus-capacitance-pf = <400>;
146       snps,clk-freq-optimized;
148   - |
150       compatible = "snps,designware-i2c";
152       #address-cells = <1>;
153       #size-cells = <0>;
154       clock-frequency = <400000>;
163   - |
165       compatible = "mscc,ocelot-i2c", "snps,designware-i2c";
167       pinctrl-0 = <&i2c_pins>;
168       pinctrl-names = "default";