bindings/i2c/qcom%2Ci2c-qup.yaml

1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i2c/qcom,i2c-qup.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Andy Gross <agross@kernel.org>
11   - Bjorn Andersson <bjorn.andersson@linaro.org>
12   - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
15   - $ref: /schemas/i2c/i2c-controller.yaml#
20       - qcom,i2c-qup-v1.1.1     # for 8660, 8960 and 8064
21       - qcom,i2c-qup-v2.1.1     # for 8974 v1
22       - qcom,i2c-qup-v2.2.1     # for 8974 v2 and later
27   clock-names:
29       - const: core
30       - const: iface
32   clock-frequency:
38   dma-names:
40       - const: tx
41       - const: rx
49   pinctrl-0: true
50   pinctrl-1: true
52   pinctrl-names:
55       - const: default
56       - const: sleep
58   power-domains:
64   required-opps:
68   - compatible
69   - clock-names
70   - clocks
71   - interrupts
72   - reg
77   - |
78     #include <dt-bindings/clock/qcom,gcc-msm8998.h>
79     #include <dt-bindings/interconnect/qcom,msm8996.h>
80     #include <dt-bindings/interrupt-controller/arm-gic.h>
81     #include <dt-bindings/power/qcom-rpmpd.h>
84         compatible = "qcom,i2c-qup-v2.2.1";
88         clocks = <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>,
89                  <&gcc GCC_BLSP1_AHB_CLK>;
90         clock-names = "core", "iface";
92         dma-names = "tx", "rx";
93         pinctrl-names = "default", "sleep";
94         pinctrl-0 = <&blsp1_i2c1_default>;
95         pinctrl-1 = <&blsp1_i2c1_sleep>;
96         power-domains = <&rpmpd MSM8909_VDDCX>;
97         required-opps = <&rpmpd_opp_svs_krait>;
99         clock-frequency = <400000>;
101         #address-cells = <1>;
102         #size-cells = <0>;