bindings/dma/atmel%2Csama5d4-dma.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/atmel,sama5d4-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip AT91 Extensible Direct Memory Access Controller
10   - Nicolas Ferre <nicolas.ferre@microchip.com>
11   - Charan Pedumuru <charan.pedumuru@microchip.com>
14   The DMA Controller (XDMAC) is a AHB-protocol central direct memory access
15   controller. It performs peripheral data transfer and memory move operations
18   or memory-to-memory transfers. The channel features are configurable at
22   - $ref: dma-controller.yaml#
27       - enum:
28           - atmel,sama5d4-dma
29           - microchip,sama7g5-dma
30       - items:
31           - enum:
32               - microchip,sam9x60-dma
33               - microchip,sam9x7-dma
34           - const: atmel,sama5d4-dma
35       - items:
36           - const: microchip,sama7d65-dma
37           - const: microchip,sama7g5-dma
39   "#dma-cells":
43         - bit 13: SIF (Source Interface Identifier) for memory interface.
44         - bit 14: DIF (Destination Interface Identifier) for peripheral interface.
45         - bit 30-24: PERID (Peripheral Identifier).
57   clock-names:
61   - compatible
62   - reg
63   - interrupts
64   - clocks
65   - clock-names
66   - "#dma-cells"
71   - |
72     #include <dt-bindings/clock/at91.h>
73     #include <dt-bindings/dma/at91.h>
74     #include <dt-bindings/interrupt-controller/irq.h>
75     dma-controller@f0008000 {
76         compatible = "atmel,sama5d4-dma";
79         #dma-cells = <1>;
81         clock-names = "dma_clk";