arch/riscv/hwprobe.rst

1 .. SPDX-License-Identifier: GPL-2.0
3 RISC-V Hardware Probing Interface
4 ---------------------------------
6 The RISC-V hardware probing interface is based around a single syscall, which
18 The arguments are split into three groups: an array of key-value pairs, a CPU
19 set, and some flags. The key-value pairs are supplied with a count. Userspace
22 will be cleared to -1, and its value set to 0. The CPU set is defined by
23 CPU_SET(3) with size ``cpusetsize`` bytes. For value-like keys (eg. vendor,
25 have the same value. Otherwise -1 will be returned. For boolean-like keys, the
33   by sys_riscv_hwprobe() to only those which match each of the key-value pairs.
34   How matching is done depends on the key type.  For value-like keys, matching
35   means to be the exact same as the value.  For boolean-like keys, matching
49   as defined by the RISC-V privileged architecture specification.
52   defined by the RISC-V privileged architecture specification.
55   defined by the RISC-V privileged architecture specification.
58   user-visible behavior that this kernel supports.  The following base user ABIs
68       kernel-controlled mechanism such as the vDSO).
76     minimumNumber/maximumNumber, not minNum/maxNum") of the RISC-V ISA manual.
78   * :c:macro:`RISCV_HWPROBE_IMA_C`: The C extension is supported, as defined
79     by version 2.2 of the RISC-V ISA manual.
81   * :c:macro:`RISCV_HWPROBE_IMA_V`: The V extension is supported, as defined by
82     version 1.0 of the RISC-V Vector extension manual.
84   * :c:macro:`RISCV_HWPROBE_EXT_ZBA`: The Zba address generation extension is
85        supported, as defined in version 1.0 of the Bit-Manipulation ISA
88   * :c:macro:`RISCV_HWPROBE_EXT_ZBB`: The Zbb extension is supported, as defined
89        in version 1.0 of the Bit-Manipulation ISA extensions.
91   * :c:macro:`RISCV_HWPROBE_EXT_ZBS`: The Zbs extension is supported, as defined
92        in version 1.0 of the Bit-Manipulation ISA extensions.
94   * :c:macro:`RISCV_HWPROBE_EXT_ZICBOZ`: The Zicboz extension is supported, as
95        ratified in commit 3dd606f ("Create cmobase-v1.0.pdf") of riscv-CMOs.
97   * :c:macro:`RISCV_HWPROBE_EXT_ZBC` The Zbc extension is supported, as defined
98        in version 1.0 of the Bit-Manipulation ISA extensions.
100   * :c:macro:`RISCV_HWPROBE_EXT_ZBKB` The Zbkb extension is supported, as
103   * :c:macro:`RISCV_HWPROBE_EXT_ZBKC` The Zbkc extension is supported, as
106   * :c:macro:`RISCV_HWPROBE_EXT_ZBKX` The Zbkx extension is supported, as
109   * :c:macro:`RISCV_HWPROBE_EXT_ZKND` The Zknd extension is supported, as
112   * :c:macro:`RISCV_HWPROBE_EXT_ZKNE` The Zkne extension is supported, as
115   * :c:macro:`RISCV_HWPROBE_EXT_ZKNH` The Zknh extension is supported, as
118   * :c:macro:`RISCV_HWPROBE_EXT_ZKSED` The Zksed extension is supported, as
121   * :c:macro:`RISCV_HWPROBE_EXT_ZKSH` The Zksh extension is supported, as
124   * :c:macro:`RISCV_HWPROBE_EXT_ZKT` The Zkt extension is supported, as defined
127   * :c:macro:`RISCV_HWPROBE_EXT_ZVBB`: The Zvbb extension is supported as
128        defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
130   * :c:macro:`RISCV_HWPROBE_EXT_ZVBC`: The Zvbc extension is supported as
131        defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
133   * :c:macro:`RISCV_HWPROBE_EXT_ZVKB`: The Zvkb extension is supported as
134        defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
136   * :c:macro:`RISCV_HWPROBE_EXT_ZVKG`: The Zvkg extension is supported as
137        defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
139   * :c:macro:`RISCV_HWPROBE_EXT_ZVKNED`: The Zvkned extension is supported as
140        defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
142   * :c:macro:`RISCV_HWPROBE_EXT_ZVKNHA`: The Zvknha extension is supported as
143        defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
145   * :c:macro:`RISCV_HWPROBE_EXT_ZVKNHB`: The Zvknhb extension is supported as
146        defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
148   * :c:macro:`RISCV_HWPROBE_EXT_ZVKSED`: The Zvksed extension is supported as
149        defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
151   * :c:macro:`RISCV_HWPROBE_EXT_ZVKSH`: The Zvksh extension is supported as
152        defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
154   * :c:macro:`RISCV_HWPROBE_EXT_ZVKT`: The Zvkt extension is supported as
155        defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
157   * :c:macro:`RISCV_HWPROBE_EXT_ZFH`: The Zfh extension version 1.0 is supported
158        as defined in the RISC-V ISA manual.
160   * :c:macro:`RISCV_HWPROBE_EXT_ZFHMIN`: The Zfhmin extension version 1.0 is
161        supported as defined in the RISC-V ISA manual.
163   * :c:macro:`RISCV_HWPROBE_EXT_ZIHINTNTL`: The Zihintntl extension version 1.0
164        is supported as defined in the RISC-V ISA manual.
166   * :c:macro:`RISCV_HWPROBE_EXT_ZVFH`: The Zvfh extension is supported as
167        defined in the RISC-V Vector manual starting from commit e2ccd0548d6c
170   * :c:macro:`RISCV_HWPROBE_EXT_ZVFHMIN`: The Zvfhmin extension is supported as
171        defined in the RISC-V Vector manual starting from commit e2ccd0548d6c
174   * :c:macro:`RISCV_HWPROBE_EXT_ZFA`: The Zfa extension is supported as
175        defined in the RISC-V ISA manual starting from commit 056b6ff467c7
178   * :c:macro:`RISCV_HWPROBE_EXT_ZTSO`: The Ztso extension is supported as
179        defined in the RISC-V ISA manual starting from commit 5618fb5a216b
182   * :c:macro:`RISCV_HWPROBE_EXT_ZACAS`: The Zacas extension is supported as
183        defined in the Atomic Compare-and-Swap (CAS) instructions manual starting
186   * :c:macro:`RISCV_HWPROBE_EXT_ZICNTR`: The Zicntr extension version 2.0
187        is supported as defined in the RISC-V ISA manual.
189   * :c:macro:`RISCV_HWPROBE_EXT_ZICOND`: The Zicond extension is supported as
190        defined in the RISC-V Integer Conditional (Zicond) operations extension
194   * :c:macro:`RISCV_HWPROBE_EXT_ZIHINTPAUSE`: The Zihintpause extension is
195        supported as defined in the RISC-V ISA manual starting from commit
198   * :c:macro:`RISCV_HWPROBE_EXT_ZIHPM`: The Zihpm extension version 2.0
199        is supported as defined in the RISC-V ISA manual.
201   * :c:macro:`RISCV_HWPROBE_EXT_ZVE32X`: The Vector sub-extension Zve32x is
202     supported, as defined by version 1.0 of the RISC-V Vector extension manual.
204   * :c:macro:`RISCV_HWPROBE_EXT_ZVE32F`: The Vector sub-extension Zve32f is
205     supported, as defined by version 1.0 of the RISC-V Vector extension manual.
207   * :c:macro:`RISCV_HWPROBE_EXT_ZVE64X`: The Vector sub-extension Zve64x is
208     supported, as defined by version 1.0 of the RISC-V Vector extension manual.
210   * :c:macro:`RISCV_HWPROBE_EXT_ZVE64F`: The Vector sub-extension Zve64f is
211     supported, as defined by version 1.0 of the RISC-V Vector extension manual.
213   * :c:macro:`RISCV_HWPROBE_EXT_ZVE64D`: The Vector sub-extension Zve64d is
214     supported, as defined by version 1.0 of the RISC-V Vector extension manual.
216   * :c:macro:`RISCV_HWPROBE_EXT_ZIMOP`: The Zimop May-Be-Operations extension is
217        supported as defined in the RISC-V ISA manual starting from commit
220   * :c:macro:`RISCV_HWPROBE_EXT_ZCA`: The Zca extension part of Zc* standard
223        riscv-code-size-reduction.
225   * :c:macro:`RISCV_HWPROBE_EXT_ZCB`: The Zcb extension part of Zc* standard
228        riscv-code-size-reduction.
230   * :c:macro:`RISCV_HWPROBE_EXT_ZCD`: The Zcd extension part of Zc* standard
233        riscv-code-size-reduction.
235   * :c:macro:`RISCV_HWPROBE_EXT_ZCF`: The Zcf extension part of Zc* standard
238        riscv-code-size-reduction.
240   * :c:macro:`RISCV_HWPROBE_EXT_ZCMOP`: The Zcmop May-Be-Operations extension is
241        supported as defined in the RISC-V ISA manual starting from commit
244   * :c:macro:`RISCV_HWPROBE_EXT_ZAWRS`: The Zawrs extension is supported as
246        riscv/zawrs") of riscv-isa-manual.
248   * :c:macro:`RISCV_HWPROBE_EXT_ZAAMO`: The Zaamo extension is supported as
249        defined in the in the RISC-V ISA manual starting from commit e87412e621f1
252   * :c:macro:`RISCV_HWPROBE_EXT_ZALRSC`: The Zalrsc extension is supported as
253        defined in the in the RISC-V ISA manual starting from commit e87412e621f1
256   * :c:macro:`RISCV_HWPROBE_EXT_SUPM`: The Supm extension is supported as
257        defined in version 1.0 of the RISC-V Pointer Masking extensions.
259   * :c:macro:`RISCV_HWPROBE_EXT_ZFBFMIN`: The Zfbfmin extension is supported as
260        defined in the RISC-V ISA manual starting from commit 4dc23d6229de
263   * :c:macro:`RISCV_HWPROBE_EXT_ZVFBFMIN`: The Zvfbfmin extension is supported as
264        defined in the RISC-V ISA manual starting from commit 4dc23d6229de
267   * :c:macro:`RISCV_HWPROBE_EXT_ZVFBFWMA`: The Zvfbfwma extension is supported as
268        defined in the RISC-V ISA manual starting from commit 4dc23d6229de
271   * :c:macro:`RISCV_HWPROBE_EXT_ZICBOM`: The Zicbom extension is supported, as
272        ratified in commit 3dd606f ("Create cmobase-v1.0.pdf") of riscv-CMOs.
316   * :c:macro:`RISCV_HWPROBE_MISALIGNED_VECTOR_SLOW`: 32-bit misaligned accesses using vector
320   * :c:macro:`RISCV_HWPROBE_MISALIGNED_VECTOR_FAST`: 32-bit misaligned accesses using vector
327   thead vendor extensions that are compatible with the
330   * T-HEAD
333         extension is supported in the T-Head ISA extensions spec starting from
334 	commit a18c801634 ("Add T-Head VECTOR vendor extension. ").