Lines Matching +full:0 +full:- +full:3
1 // SPDX-License-Identifier: GPL-2.0
9 * list new registers with get-reg-list. We assume they'll be unused, at
13 * a regression in get-reg-list. This test checks for that regression by
17 * by running the test with the --list command line argument.
23 * from guests"). Also, one must use the --core-reg-fixup command line
43 for ((i) = 0; (i) < reg_list->n; ++(i))
46 for ((i) = 0; (i) < blessed_n; ++(i)) \
47 if (!find_reg(reg_list->reg, reg_list->n, blessed_reg[i]))
50 for ((i) = 0; (i) < reg_list->n; ++(i)) \
51 if (!find_reg(blessed_reg, blessed_n, reg_list->reg[i]))
64 for (i = 0; i < nr_regs; ++i) in find_reg()
95 case KVM_REG_ARM_CORE_REG(regs.regs[0]) ... in core_id_to_str()
97 idx = (core_off - KVM_REG_ARM_CORE_REG(regs.regs[0])) / CORE_REGS_XX_NR_WORDS; in core_id_to_str()
110 case KVM_REG_ARM_CORE_REG(spsr[0]) ... in core_id_to_str()
111 KVM_REG_ARM_CORE_REG(spsr[KVM_NR_SPSR - 1]): in core_id_to_str()
112 idx = (core_off - KVM_REG_ARM_CORE_REG(spsr[0])) / CORE_SPSR_XX_NR_WORDS; in core_id_to_str()
115 case KVM_REG_ARM_CORE_REG(fp_regs.vregs[0]) ... in core_id_to_str()
117 idx = (core_off - KVM_REG_ARM_CORE_REG(fp_regs.vregs[0])) / CORE_FPREGS_XX_NR_WORDS; in core_id_to_str()
126 TEST_FAIL("Unknown core reg id: 0x%llx", id); in core_id_to_str()
137 sve_off = id & ~(REG_MASK | ((1ULL << 5) - 1)); in sve_id_to_str()
138 i = id & (KVM_ARM64_SVE_MAX_SLICES - 1); in sve_id_to_str()
140 TEST_ASSERT(i == 0, "Currently we don't expect slice > 0, reg id 0x%llx", id); in sve_id_to_str()
144 KVM_REG_ARM64_SVE_ZREG_BASE + (1ULL << 5) * KVM_ARM64_SVE_NUM_ZREGS - 1: in sve_id_to_str()
145 n = (id >> 5) & (KVM_ARM64_SVE_NUM_ZREGS - 1); in sve_id_to_str()
146 TEST_ASSERT(id == KVM_REG_ARM64_SVE_ZREG(n, 0), in sve_id_to_str()
147 "Unexpected bits set in SVE ZREG id: 0x%llx", id); in sve_id_to_str()
148 return str_with_index("KVM_REG_ARM64_SVE_ZREG(##, 0)", n); in sve_id_to_str()
150 KVM_REG_ARM64_SVE_PREG_BASE + (1ULL << 5) * KVM_ARM64_SVE_NUM_PREGS - 1: in sve_id_to_str()
151 n = (id >> 5) & (KVM_ARM64_SVE_NUM_PREGS - 1); in sve_id_to_str()
152 TEST_ASSERT(id == KVM_REG_ARM64_SVE_PREG(n, 0), in sve_id_to_str()
153 "Unexpected bits set in SVE PREG id: 0x%llx", id); in sve_id_to_str()
154 return str_with_index("KVM_REG_ARM64_SVE_PREG(##, 0)", n); in sve_id_to_str()
156 TEST_ASSERT(id == KVM_REG_ARM64_SVE_FFR(0), in sve_id_to_str()
157 "Unexpected bits set in SVE FFR id: 0x%llx", id); in sve_id_to_str()
158 return "KVM_REG_ARM64_SVE_FFR(0)"; in sve_id_to_str()
170 "KVM_REG_ARM64 missing in reg id: 0x%llx", id); in print_reg()
201 TEST_FAIL("Unexpected reg size: 0x%llx in reg id: 0x%llx", in print_reg()
211 "Unexpected bits set in DEMUX reg id: 0x%llx", id); in print_reg()
222 "Unexpected bits set in SYSREG reg id: 0x%llx", id); in print_reg()
226 TEST_ASSERT(id == KVM_REG_ARM_FW_REG(id & 0xffff), in print_reg()
227 "Unexpected bits set in FW reg id: 0x%llx", id); in print_reg()
228 printf("\tKVM_REG_ARM_FW_REG(%lld),\n", id & 0xffff); in print_reg()
234 TEST_FAIL("KVM_REG_ARM64_SVE is an unexpected coproc type in reg id: 0x%llx", id); in print_reg()
237 TEST_FAIL("Unexpected coproc type: 0x%llx in reg id: 0x%llx", in print_reg()
243 * Older kernels listed each 32-bit word of CORE registers separately.
244 * For 64 and 128-bit registers we need to ignore the extra words. We
246 * registers were 64-bit, even when they weren't.
254 tmp = calloc(1, sizeof(*tmp) + reg_list->n * sizeof(__u64)); in core_reg_fixup()
256 for (i = 0; i < reg_list->n; ++i) { in core_reg_fixup()
257 id = reg_list->reg[i]; in core_reg_fixup()
260 tmp->reg[tmp->n++] = id; in core_reg_fixup()
267 case 0x52: case 0xd2: case 0xd6: in core_reg_fixup()
273 case KVM_REG_ARM_CORE_REG(fp_regs.vregs[0]) ... in core_reg_fixup()
275 if (core_off & 3) in core_reg_fixup()
279 tmp->reg[tmp->n++] = id; in core_reg_fixup()
285 tmp->reg[tmp->n++] = id; in core_reg_fixup()
290 tmp->reg[tmp->n++] = id; in core_reg_fixup()
302 init->features[0] |= 1 << KVM_ARM_VCPU_SVE; in prepare_vcpu_init()
325 struct kvm_vcpu_init init = { .target = -1, }; in main()
326 int new_regs = 0, missing_regs = 0, i; in main()
327 int failed_get = 0, failed_set = 0, failed_reject = 0; in main()
335 if (strcmp(av[i], "--core-reg-fixup") == 0) in main()
337 else if (strcmp(av[i], "--list") == 0) in main()
345 aarch64_vcpu_add_default(vm, 0, &init, NULL); in main()
346 finalize_vcpu(vm, 0); in main()
348 reg_list = vcpu_get_reg_list(vm, 0); in main()
356 print_reg(reg_list->reg[i]); in main()
358 return 0; in main()
374 .id = reg_list->reg[i], in main()
379 ret = _vcpu_ioctl(vm, 0, KVM_GET_ONE_REG, ®); in main()
389 ret = _vcpu_ioctl(vm, 0, KVM_SET_ONE_REG, ®); in main()
390 if (ret != -1 || errno != EPERM) { in main()
399 ret = _vcpu_ioctl(vm, 0, KVM_SET_ONE_REG, ®); in main()
417 for (i = 0; i < base_regs_n; ++i) in main()
419 for (i = 0; i < blessed_n - base_regs_n; ++i) in main()
430 printf("Number registers: %5lld\n", reg_list->n); in main()
438 print_reg(reg_list->reg[i]); in main()
455 return 0; in main()
460 * v4.15 with --core-reg-fixup and then later updated with new registers.
463 KVM_REG_ARM64 | KVM_REG_SIZE_U64 | KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(regs.regs[0]),
466 KVM_REG_ARM64 | KVM_REG_SIZE_U64 | KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(regs.regs[3]),
499 KVM_REG_ARM64 | KVM_REG_SIZE_U64 | KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(spsr[0]),
502 KVM_REG_ARM64 | KVM_REG_SIZE_U64 | KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(spsr[3]),
506 KVM_REG_ARM_FW_REG(0),
509 ARM64_SYS_REG(3, 3, 14, 3, 1), /* CNTV_CTL_EL0 */
510 ARM64_SYS_REG(3, 3, 14, 3, 2), /* CNTV_CVAL_EL0 */
511 ARM64_SYS_REG(3, 3, 14, 0, 2),
512 ARM64_SYS_REG(3, 0, 0, 0, 0), /* MIDR_EL1 */
513 ARM64_SYS_REG(3, 0, 0, 0, 6), /* REVIDR_EL1 */
514 ARM64_SYS_REG(3, 1, 0, 0, 1), /* CLIDR_EL1 */
515 ARM64_SYS_REG(3, 1, 0, 0, 7), /* AIDR_EL1 */
516 ARM64_SYS_REG(3, 3, 0, 0, 1), /* CTR_EL0 */
517 ARM64_SYS_REG(2, 0, 0, 0, 4),
518 ARM64_SYS_REG(2, 0, 0, 0, 5),
519 ARM64_SYS_REG(2, 0, 0, 0, 6),
520 ARM64_SYS_REG(2, 0, 0, 0, 7),
521 ARM64_SYS_REG(2, 0, 0, 1, 4),
522 ARM64_SYS_REG(2, 0, 0, 1, 5),
523 ARM64_SYS_REG(2, 0, 0, 1, 6),
524 ARM64_SYS_REG(2, 0, 0, 1, 7),
525 ARM64_SYS_REG(2, 0, 0, 2, 0), /* MDCCINT_EL1 */
526 ARM64_SYS_REG(2, 0, 0, 2, 2), /* MDSCR_EL1 */
527 ARM64_SYS_REG(2, 0, 0, 2, 4),
528 ARM64_SYS_REG(2, 0, 0, 2, 5),
529 ARM64_SYS_REG(2, 0, 0, 2, 6),
530 ARM64_SYS_REG(2, 0, 0, 2, 7),
531 ARM64_SYS_REG(2, 0, 0, 3, 4),
532 ARM64_SYS_REG(2, 0, 0, 3, 5),
533 ARM64_SYS_REG(2, 0, 0, 3, 6),
534 ARM64_SYS_REG(2, 0, 0, 3, 7),
535 ARM64_SYS_REG(2, 0, 0, 4, 4),
536 ARM64_SYS_REG(2, 0, 0, 4, 5),
537 ARM64_SYS_REG(2, 0, 0, 4, 6),
538 ARM64_SYS_REG(2, 0, 0, 4, 7),
539 ARM64_SYS_REG(2, 0, 0, 5, 4),
540 ARM64_SYS_REG(2, 0, 0, 5, 5),
541 ARM64_SYS_REG(2, 0, 0, 5, 6),
542 ARM64_SYS_REG(2, 0, 0, 5, 7),
543 ARM64_SYS_REG(2, 0, 0, 6, 4),
544 ARM64_SYS_REG(2, 0, 0, 6, 5),
545 ARM64_SYS_REG(2, 0, 0, 6, 6),
546 ARM64_SYS_REG(2, 0, 0, 6, 7),
547 ARM64_SYS_REG(2, 0, 0, 7, 4),
548 ARM64_SYS_REG(2, 0, 0, 7, 5),
549 ARM64_SYS_REG(2, 0, 0, 7, 6),
550 ARM64_SYS_REG(2, 0, 0, 7, 7),
551 ARM64_SYS_REG(2, 0, 0, 8, 4),
552 ARM64_SYS_REG(2, 0, 0, 8, 5),
553 ARM64_SYS_REG(2, 0, 0, 8, 6),
554 ARM64_SYS_REG(2, 0, 0, 8, 7),
555 ARM64_SYS_REG(2, 0, 0, 9, 4),
556 ARM64_SYS_REG(2, 0, 0, 9, 5),
557 ARM64_SYS_REG(2, 0, 0, 9, 6),
558 ARM64_SYS_REG(2, 0, 0, 9, 7),
559 ARM64_SYS_REG(2, 0, 0, 10, 4),
560 ARM64_SYS_REG(2, 0, 0, 10, 5),
561 ARM64_SYS_REG(2, 0, 0, 10, 6),
562 ARM64_SYS_REG(2, 0, 0, 10, 7),
563 ARM64_SYS_REG(2, 0, 0, 11, 4),
564 ARM64_SYS_REG(2, 0, 0, 11, 5),
565 ARM64_SYS_REG(2, 0, 0, 11, 6),
566 ARM64_SYS_REG(2, 0, 0, 11, 7),
567 ARM64_SYS_REG(2, 0, 0, 12, 4),
568 ARM64_SYS_REG(2, 0, 0, 12, 5),
569 ARM64_SYS_REG(2, 0, 0, 12, 6),
570 ARM64_SYS_REG(2, 0, 0, 12, 7),
571 ARM64_SYS_REG(2, 0, 0, 13, 4),
572 ARM64_SYS_REG(2, 0, 0, 13, 5),
573 ARM64_SYS_REG(2, 0, 0, 13, 6),
574 ARM64_SYS_REG(2, 0, 0, 13, 7),
575 ARM64_SYS_REG(2, 0, 0, 14, 4),
576 ARM64_SYS_REG(2, 0, 0, 14, 5),
577 ARM64_SYS_REG(2, 0, 0, 14, 6),
578 ARM64_SYS_REG(2, 0, 0, 14, 7),
579 ARM64_SYS_REG(2, 0, 0, 15, 4),
580 ARM64_SYS_REG(2, 0, 0, 15, 5),
581 ARM64_SYS_REG(2, 0, 0, 15, 6),
582 ARM64_SYS_REG(2, 0, 0, 15, 7),
583 ARM64_SYS_REG(2, 4, 0, 7, 0), /* DBGVCR32_EL2 */
584 ARM64_SYS_REG(3, 0, 0, 0, 5), /* MPIDR_EL1 */
585 ARM64_SYS_REG(3, 0, 0, 1, 0), /* ID_PFR0_EL1 */
586 ARM64_SYS_REG(3, 0, 0, 1, 1), /* ID_PFR1_EL1 */
587 ARM64_SYS_REG(3, 0, 0, 1, 2), /* ID_DFR0_EL1 */
588 ARM64_SYS_REG(3, 0, 0, 1, 3), /* ID_AFR0_EL1 */
589 ARM64_SYS_REG(3, 0, 0, 1, 4), /* ID_MMFR0_EL1 */
590 ARM64_SYS_REG(3, 0, 0, 1, 5), /* ID_MMFR1_EL1 */
591 ARM64_SYS_REG(3, 0, 0, 1, 6), /* ID_MMFR2_EL1 */
592 ARM64_SYS_REG(3, 0, 0, 1, 7), /* ID_MMFR3_EL1 */
593 ARM64_SYS_REG(3, 0, 0, 2, 0), /* ID_ISAR0_EL1 */
594 ARM64_SYS_REG(3, 0, 0, 2, 1), /* ID_ISAR1_EL1 */
595 ARM64_SYS_REG(3, 0, 0, 2, 2), /* ID_ISAR2_EL1 */
596 ARM64_SYS_REG(3, 0, 0, 2, 3), /* ID_ISAR3_EL1 */
597 ARM64_SYS_REG(3, 0, 0, 2, 4), /* ID_ISAR4_EL1 */
598 ARM64_SYS_REG(3, 0, 0, 2, 5), /* ID_ISAR5_EL1 */
599 ARM64_SYS_REG(3, 0, 0, 2, 6), /* ID_MMFR4_EL1 */
600 ARM64_SYS_REG(3, 0, 0, 2, 7), /* ID_ISAR6_EL1 */
601 ARM64_SYS_REG(3, 0, 0, 3, 0), /* MVFR0_EL1 */
602 ARM64_SYS_REG(3, 0, 0, 3, 1), /* MVFR1_EL1 */
603 ARM64_SYS_REG(3, 0, 0, 3, 2), /* MVFR2_EL1 */
604 ARM64_SYS_REG(3, 0, 0, 3, 3),
605 ARM64_SYS_REG(3, 0, 0, 3, 4), /* ID_PFR2_EL1 */
606 ARM64_SYS_REG(3, 0, 0, 3, 5), /* ID_DFR1_EL1 */
607 ARM64_SYS_REG(3, 0, 0, 3, 6), /* ID_MMFR5_EL1 */
608 ARM64_SYS_REG(3, 0, 0, 3, 7),
609 ARM64_SYS_REG(3, 0, 0, 4, 0), /* ID_AA64PFR0_EL1 */
610 ARM64_SYS_REG(3, 0, 0, 4, 1), /* ID_AA64PFR1_EL1 */
611 ARM64_SYS_REG(3, 0, 0, 4, 2),
612 ARM64_SYS_REG(3, 0, 0, 4, 3),
613 ARM64_SYS_REG(3, 0, 0, 4, 4), /* ID_AA64ZFR0_EL1 */
614 ARM64_SYS_REG(3, 0, 0, 4, 5),
615 ARM64_SYS_REG(3, 0, 0, 4, 6),
616 ARM64_SYS_REG(3, 0, 0, 4, 7),
617 ARM64_SYS_REG(3, 0, 0, 5, 0), /* ID_AA64DFR0_EL1 */
618 ARM64_SYS_REG(3, 0, 0, 5, 1), /* ID_AA64DFR1_EL1 */
619 ARM64_SYS_REG(3, 0, 0, 5, 2),
620 ARM64_SYS_REG(3, 0, 0, 5, 3),
621 ARM64_SYS_REG(3, 0, 0, 5, 4), /* ID_AA64AFR0_EL1 */
622 ARM64_SYS_REG(3, 0, 0, 5, 5), /* ID_AA64AFR1_EL1 */
623 ARM64_SYS_REG(3, 0, 0, 5, 6),
624 ARM64_SYS_REG(3, 0, 0, 5, 7),
625 ARM64_SYS_REG(3, 0, 0, 6, 0), /* ID_AA64ISAR0_EL1 */
626 ARM64_SYS_REG(3, 0, 0, 6, 1), /* ID_AA64ISAR1_EL1 */
627 ARM64_SYS_REG(3, 0, 0, 6, 2),
628 ARM64_SYS_REG(3, 0, 0, 6, 3),
629 ARM64_SYS_REG(3, 0, 0, 6, 4),
630 ARM64_SYS_REG(3, 0, 0, 6, 5),
631 ARM64_SYS_REG(3, 0, 0, 6, 6),
632 ARM64_SYS_REG(3, 0, 0, 6, 7),
633 ARM64_SYS_REG(3, 0, 0, 7, 0), /* ID_AA64MMFR0_EL1 */
634 ARM64_SYS_REG(3, 0, 0, 7, 1), /* ID_AA64MMFR1_EL1 */
635 ARM64_SYS_REG(3, 0, 0, 7, 2), /* ID_AA64MMFR2_EL1 */
636 ARM64_SYS_REG(3, 0, 0, 7, 3),
637 ARM64_SYS_REG(3, 0, 0, 7, 4),
638 ARM64_SYS_REG(3, 0, 0, 7, 5),
639 ARM64_SYS_REG(3, 0, 0, 7, 6),
640 ARM64_SYS_REG(3, 0, 0, 7, 7),
641 ARM64_SYS_REG(3, 0, 1, 0, 0), /* SCTLR_EL1 */
642 ARM64_SYS_REG(3, 0, 1, 0, 1), /* ACTLR_EL1 */
643 ARM64_SYS_REG(3, 0, 1, 0, 2), /* CPACR_EL1 */
644 ARM64_SYS_REG(3, 0, 2, 0, 0), /* TTBR0_EL1 */
645 ARM64_SYS_REG(3, 0, 2, 0, 1), /* TTBR1_EL1 */
646 ARM64_SYS_REG(3, 0, 2, 0, 2), /* TCR_EL1 */
647 ARM64_SYS_REG(3, 0, 5, 1, 0), /* AFSR0_EL1 */
648 ARM64_SYS_REG(3, 0, 5, 1, 1), /* AFSR1_EL1 */
649 ARM64_SYS_REG(3, 0, 5, 2, 0), /* ESR_EL1 */
650 ARM64_SYS_REG(3, 0, 6, 0, 0), /* FAR_EL1 */
651 ARM64_SYS_REG(3, 0, 7, 4, 0), /* PAR_EL1 */
652 ARM64_SYS_REG(3, 0, 9, 14, 1), /* PMINTENSET_EL1 */
653 ARM64_SYS_REG(3, 0, 9, 14, 2), /* PMINTENCLR_EL1 */
654 ARM64_SYS_REG(3, 0, 10, 2, 0), /* MAIR_EL1 */
655 ARM64_SYS_REG(3, 0, 10, 3, 0), /* AMAIR_EL1 */
656 ARM64_SYS_REG(3, 0, 12, 0, 0), /* VBAR_EL1 */
657 ARM64_SYS_REG(3, 0, 12, 1, 1), /* DISR_EL1 */
658 ARM64_SYS_REG(3, 0, 13, 0, 1), /* CONTEXTIDR_EL1 */
659 ARM64_SYS_REG(3, 0, 13, 0, 4), /* TPIDR_EL1 */
660 ARM64_SYS_REG(3, 0, 14, 1, 0), /* CNTKCTL_EL1 */
661 ARM64_SYS_REG(3, 2, 0, 0, 0), /* CSSELR_EL1 */
662 ARM64_SYS_REG(3, 3, 9, 12, 0), /* PMCR_EL0 */
663 ARM64_SYS_REG(3, 3, 9, 12, 1), /* PMCNTENSET_EL0 */
664 ARM64_SYS_REG(3, 3, 9, 12, 2), /* PMCNTENCLR_EL0 */
665 ARM64_SYS_REG(3, 3, 9, 12, 3), /* PMOVSCLR_EL0 */
666 ARM64_SYS_REG(3, 3, 9, 12, 4), /* PMSWINC_EL0 */
667 ARM64_SYS_REG(3, 3, 9, 12, 5), /* PMSELR_EL0 */
668 ARM64_SYS_REG(3, 3, 9, 13, 0), /* PMCCNTR_EL0 */
669 ARM64_SYS_REG(3, 3, 9, 14, 0), /* PMUSERENR_EL0 */
670 ARM64_SYS_REG(3, 3, 9, 14, 3), /* PMOVSSET_EL0 */
671 ARM64_SYS_REG(3, 3, 13, 0, 2), /* TPIDR_EL0 */
672 ARM64_SYS_REG(3, 3, 13, 0, 3), /* TPIDRRO_EL0 */
673 ARM64_SYS_REG(3, 3, 14, 8, 0),
674 ARM64_SYS_REG(3, 3, 14, 8, 1),
675 ARM64_SYS_REG(3, 3, 14, 8, 2),
676 ARM64_SYS_REG(3, 3, 14, 8, 3),
677 ARM64_SYS_REG(3, 3, 14, 8, 4),
678 ARM64_SYS_REG(3, 3, 14, 8, 5),
679 ARM64_SYS_REG(3, 3, 14, 8, 6),
680 ARM64_SYS_REG(3, 3, 14, 8, 7),
681 ARM64_SYS_REG(3, 3, 14, 9, 0),
682 ARM64_SYS_REG(3, 3, 14, 9, 1),
683 ARM64_SYS_REG(3, 3, 14, 9, 2),
684 ARM64_SYS_REG(3, 3, 14, 9, 3),
685 ARM64_SYS_REG(3, 3, 14, 9, 4),
686 ARM64_SYS_REG(3, 3, 14, 9, 5),
687 ARM64_SYS_REG(3, 3, 14, 9, 6),
688 ARM64_SYS_REG(3, 3, 14, 9, 7),
689 ARM64_SYS_REG(3, 3, 14, 10, 0),
690 ARM64_SYS_REG(3, 3, 14, 10, 1),
691 ARM64_SYS_REG(3, 3, 14, 10, 2),
692 ARM64_SYS_REG(3, 3, 14, 10, 3),
693 ARM64_SYS_REG(3, 3, 14, 10, 4),
694 ARM64_SYS_REG(3, 3, 14, 10, 5),
695 ARM64_SYS_REG(3, 3, 14, 10, 6),
696 ARM64_SYS_REG(3, 3, 14, 10, 7),
697 ARM64_SYS_REG(3, 3, 14, 11, 0),
698 ARM64_SYS_REG(3, 3, 14, 11, 1),
699 ARM64_SYS_REG(3, 3, 14, 11, 2),
700 ARM64_SYS_REG(3, 3, 14, 11, 3),
701 ARM64_SYS_REG(3, 3, 14, 11, 4),
702 ARM64_SYS_REG(3, 3, 14, 11, 5),
703 ARM64_SYS_REG(3, 3, 14, 11, 6),
704 ARM64_SYS_REG(3, 3, 14, 12, 0),
705 ARM64_SYS_REG(3, 3, 14, 12, 1),
706 ARM64_SYS_REG(3, 3, 14, 12, 2),
707 ARM64_SYS_REG(3, 3, 14, 12, 3),
708 ARM64_SYS_REG(3, 3, 14, 12, 4),
709 ARM64_SYS_REG(3, 3, 14, 12, 5),
710 ARM64_SYS_REG(3, 3, 14, 12, 6),
711 ARM64_SYS_REG(3, 3, 14, 12, 7),
712 ARM64_SYS_REG(3, 3, 14, 13, 0),
713 ARM64_SYS_REG(3, 3, 14, 13, 1),
714 ARM64_SYS_REG(3, 3, 14, 13, 2),
715 ARM64_SYS_REG(3, 3, 14, 13, 3),
716 ARM64_SYS_REG(3, 3, 14, 13, 4),
717 ARM64_SYS_REG(3, 3, 14, 13, 5),
718 ARM64_SYS_REG(3, 3, 14, 13, 6),
719 ARM64_SYS_REG(3, 3, 14, 13, 7),
720 ARM64_SYS_REG(3, 3, 14, 14, 0),
721 ARM64_SYS_REG(3, 3, 14, 14, 1),
722 ARM64_SYS_REG(3, 3, 14, 14, 2),
723 ARM64_SYS_REG(3, 3, 14, 14, 3),
724 ARM64_SYS_REG(3, 3, 14, 14, 4),
725 ARM64_SYS_REG(3, 3, 14, 14, 5),
726 ARM64_SYS_REG(3, 3, 14, 14, 6),
727 ARM64_SYS_REG(3, 3, 14, 14, 7),
728 ARM64_SYS_REG(3, 3, 14, 15, 0),
729 ARM64_SYS_REG(3, 3, 14, 15, 1),
730 ARM64_SYS_REG(3, 3, 14, 15, 2),
731 ARM64_SYS_REG(3, 3, 14, 15, 3),
732 ARM64_SYS_REG(3, 3, 14, 15, 4),
733 ARM64_SYS_REG(3, 3, 14, 15, 5),
734 ARM64_SYS_REG(3, 3, 14, 15, 6),
735 ARM64_SYS_REG(3, 3, 14, 15, 7), /* PMCCFILTR_EL0 */
736 ARM64_SYS_REG(3, 4, 3, 0, 0), /* DACR32_EL2 */
737 ARM64_SYS_REG(3, 4, 5, 0, 1), /* IFSR32_EL2 */
738 ARM64_SYS_REG(3, 4, 5, 3, 0), /* FPEXC32_EL2 */
739 KVM_REG_ARM64 | KVM_REG_SIZE_U32 | KVM_REG_ARM_DEMUX | KVM_REG_ARM_DEMUX_ID_CCSIDR | 0,
746 KVM_REG_ARM64 | KVM_REG_SIZE_U128 | KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(fp_regs.vregs[0]),
749 KVM_REG_ARM64 | KVM_REG_SIZE_U128 | KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(fp_regs.vregs[3]),
783 KVM_REG_ARM64_SVE_ZREG(0, 0),
784 KVM_REG_ARM64_SVE_ZREG(1, 0),
785 KVM_REG_ARM64_SVE_ZREG(2, 0),
786 KVM_REG_ARM64_SVE_ZREG(3, 0),
787 KVM_REG_ARM64_SVE_ZREG(4, 0),
788 KVM_REG_ARM64_SVE_ZREG(5, 0),
789 KVM_REG_ARM64_SVE_ZREG(6, 0),
790 KVM_REG_ARM64_SVE_ZREG(7, 0),
791 KVM_REG_ARM64_SVE_ZREG(8, 0),
792 KVM_REG_ARM64_SVE_ZREG(9, 0),
793 KVM_REG_ARM64_SVE_ZREG(10, 0),
794 KVM_REG_ARM64_SVE_ZREG(11, 0),
795 KVM_REG_ARM64_SVE_ZREG(12, 0),
796 KVM_REG_ARM64_SVE_ZREG(13, 0),
797 KVM_REG_ARM64_SVE_ZREG(14, 0),
798 KVM_REG_ARM64_SVE_ZREG(15, 0),
799 KVM_REG_ARM64_SVE_ZREG(16, 0),
800 KVM_REG_ARM64_SVE_ZREG(17, 0),
801 KVM_REG_ARM64_SVE_ZREG(18, 0),
802 KVM_REG_ARM64_SVE_ZREG(19, 0),
803 KVM_REG_ARM64_SVE_ZREG(20, 0),
804 KVM_REG_ARM64_SVE_ZREG(21, 0),
805 KVM_REG_ARM64_SVE_ZREG(22, 0),
806 KVM_REG_ARM64_SVE_ZREG(23, 0),
807 KVM_REG_ARM64_SVE_ZREG(24, 0),
808 KVM_REG_ARM64_SVE_ZREG(25, 0),
809 KVM_REG_ARM64_SVE_ZREG(26, 0),
810 KVM_REG_ARM64_SVE_ZREG(27, 0),
811 KVM_REG_ARM64_SVE_ZREG(28, 0),
812 KVM_REG_ARM64_SVE_ZREG(29, 0),
813 KVM_REG_ARM64_SVE_ZREG(30, 0),
814 KVM_REG_ARM64_SVE_ZREG(31, 0),
815 KVM_REG_ARM64_SVE_PREG(0, 0),
816 KVM_REG_ARM64_SVE_PREG(1, 0),
817 KVM_REG_ARM64_SVE_PREG(2, 0),
818 KVM_REG_ARM64_SVE_PREG(3, 0),
819 KVM_REG_ARM64_SVE_PREG(4, 0),
820 KVM_REG_ARM64_SVE_PREG(5, 0),
821 KVM_REG_ARM64_SVE_PREG(6, 0),
822 KVM_REG_ARM64_SVE_PREG(7, 0),
823 KVM_REG_ARM64_SVE_PREG(8, 0),
824 KVM_REG_ARM64_SVE_PREG(9, 0),
825 KVM_REG_ARM64_SVE_PREG(10, 0),
826 KVM_REG_ARM64_SVE_PREG(11, 0),
827 KVM_REG_ARM64_SVE_PREG(12, 0),
828 KVM_REG_ARM64_SVE_PREG(13, 0),
829 KVM_REG_ARM64_SVE_PREG(14, 0),
830 KVM_REG_ARM64_SVE_PREG(15, 0),
831 KVM_REG_ARM64_SVE_FFR(0),
832 ARM64_SYS_REG(3, 0, 1, 2, 0), /* ZCR_EL1 */