memory-model/Documentation/explanation.txt

343 first comes before the second in program order and they access the
569 comes first in the coherence order; the store which directly
570 overwrites the initial value comes second; the store which overwrites
571 that value comes third, and so on.
576 x's cache line).  We write W ->co W' if W comes before W' in the
583 	Write-write coherence: If W ->po-loc W' (i.e., W comes before
589 	which comes after W in the coherence order.
597 	store read by R comes before the store read by R' in the
622 write-write coherence rule: Since the store of 23 comes later in
637 rule: The READ_ONCE() load comes before the WRITE_ONCE() store in
659 would violate the read-read coherence rule: The r1 load comes before
661 comes later in the coherence order.
689 equivalently, when R reads from a store which comes earlier than W in
840 	F is a release fence and some X comes before F in program order,
906 X event comes before the Y event in the global ordering.  The LKMM's
1054 (the po-loc link says that R comes before W in program order and they
1180 they execute on different CPUs, and W comes before W' in the coherence
1194 on CPU C in situations where a store from some other CPU comes after
1374 Thus W, which comes later than E in the coherence order, will
1575 	2. X comes "before" Y in some sense (including rfe, co and fr);