Lines Matching +full:powered +full:- +full:off
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
21 #include "../sof-audio.h"
24 #include "hda-ipc.h"
56 dev_err(sdev->dev, in hda_dsp_core_reset_enter()
67 dev_err(sdev->dev, in hda_dsp_core_reset_enter()
70 ret = -EIO; in hda_dsp_core_reset_enter()
97 dev_err(sdev->dev, in hda_dsp_core_reset_leave()
107 dev_err(sdev->dev, in hda_dsp_core_reset_leave()
110 ret = -EIO; in hda_dsp_core_reset_leave()
138 dev_dbg(sdev->dev, "unstall/run core: core_mask = %x\n", core_mask); in hda_dsp_core_run()
147 dev_err(sdev->dev, "error: DSP start core failed: core_mask %x\n", in hda_dsp_core_run()
149 ret = -EIO; in hda_dsp_core_run()
178 dev_err(sdev->dev, in hda_dsp_core_power_up()
189 dev_err(sdev->dev, in hda_dsp_core_power_up()
192 ret = -EIO; in hda_dsp_core_power_up()
214 dev_err(sdev->dev, in hda_dsp_core_power_down()
234 dev_dbg(sdev->dev, "DSP core(s) enabled? %d : core_mask %x\n", in hda_dsp_core_is_enabled()
242 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in hda_dsp_enable_core()
243 const struct sof_intel_dsp_desc *chip = hda->desc; in hda_dsp_enable_core()
247 core_mask &= chip->host_managed_cores_mask; in hda_dsp_enable_core()
256 dev_err(sdev->dev, "error: dsp core power up failed: core_mask %x\n", in hda_dsp_enable_core()
267 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in hda_dsp_core_reset_power_down()
268 const struct sof_intel_dsp_desc *chip = hda->desc; in hda_dsp_core_reset_power_down()
272 core_mask &= chip->host_managed_cores_mask; in hda_dsp_core_reset_power_down()
281 dev_err(sdev->dev, "error: dsp core reset failed: core_mask %x\n", in hda_dsp_core_reset_power_down()
289 dev_err(sdev->dev, "error: dsp core power down fail mask %x: %d\n", in hda_dsp_core_reset_power_down()
294 /* make sure we are in OFF state */ in hda_dsp_core_reset_power_down()
296 dev_err(sdev->dev, "error: dsp core disable fail mask %x: %d\n", in hda_dsp_core_reset_power_down()
298 ret = -EIO; in hda_dsp_core_reset_power_down()
306 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in hda_dsp_ipc_int_enable()
307 const struct sof_intel_dsp_desc *chip = hda->desc; in hda_dsp_ipc_int_enable()
310 snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, chip->ipc_ctl, in hda_dsp_ipc_int_enable()
321 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in hda_dsp_ipc_int_disable()
322 const struct sof_intel_dsp_desc *chip = hda->desc; in hda_dsp_ipc_int_disable()
329 snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, chip->ipc_ctl, in hda_dsp_ipc_int_disable()
339 if (!retry--) in hda_dsp_wait_d0i3c_done()
340 return -ETIMEDOUT; in hda_dsp_wait_d0i3c_done()
360 return sof_ipc_tx_message_no_pm(sdev->ipc, pm_gate.hdr.cmd, in hda_dsp_send_pm_gate_ipc()
370 /* Write to D0I3C after Command-In-Progress bit is cleared */ in hda_dsp_update_d0i3c_register()
373 dev_err(bus->dev, "CIP timeout before D0I3C update!\n"); in hda_dsp_update_d0i3c_register()
383 dev_err(bus->dev, "CIP timeout after D0I3C update!\n"); in hda_dsp_update_d0i3c_register()
387 dev_vdbg(bus->dev, "D0I3C updated, register = 0x%x\n", in hda_dsp_update_d0i3c_register()
403 * 1. D3 -> D0I0 in hda_dsp_set_D0_state()
404 * 2. D0I0 -> D0I3 in hda_dsp_set_D0_state()
405 * 3. D0I3 -> D0I0 in hda_dsp_set_D0_state()
407 switch (sdev->dsp_power_state.state) { in hda_dsp_set_D0_state()
412 /* Follow regular flow for D3 -> D0 transition */ in hda_dsp_set_D0_state()
415 dev_err(sdev->dev, "error: transition from %d to %d not allowed\n", in hda_dsp_set_D0_state()
416 sdev->dsp_power_state.state, target_state->state); in hda_dsp_set_D0_state()
417 return -EINVAL; in hda_dsp_set_D0_state()
421 if (target_state->substate == SOF_HDA_DSP_PM_D0I3) { in hda_dsp_set_D0_state()
430 if (!sdev->dtrace_is_supported || in hda_dsp_set_D0_state()
432 sdev->system_suspend_target != SOF_SUSPEND_NONE) in hda_dsp_set_D0_state()
451 dev_err(sdev->dev, in hda_dsp_set_D0_state()
474 switch (sdev->dsp_power_state.state) { in hda_dsp_state_log()
476 switch (sdev->dsp_power_state.substate) { in hda_dsp_state_log()
478 dev_dbg(sdev->dev, "Current DSP power state: D0I0\n"); in hda_dsp_state_log()
481 dev_dbg(sdev->dev, "Current DSP power state: D0I3\n"); in hda_dsp_state_log()
484 dev_dbg(sdev->dev, "Unknown DSP D0 substate: %d\n", in hda_dsp_state_log()
485 sdev->dsp_power_state.substate); in hda_dsp_state_log()
490 dev_dbg(sdev->dev, "Current DSP power state: D1\n"); in hda_dsp_state_log()
493 dev_dbg(sdev->dev, "Current DSP power state: D2\n"); in hda_dsp_state_log()
496 dev_dbg(sdev->dev, "Current DSP power state: D3_HOT\n"); in hda_dsp_state_log()
499 dev_dbg(sdev->dev, "Current DSP power state: D3\n"); in hda_dsp_state_log()
502 dev_dbg(sdev->dev, "Current DSP power state: D3_COLD\n"); in hda_dsp_state_log()
505 dev_dbg(sdev->dev, "Unknown DSP power state: %d\n", in hda_dsp_state_log()
506 sdev->dsp_power_state.state); in hda_dsp_state_log()
530 if (target_state->substate == SOF_HDA_DSP_PM_D0I3 && in hda_dsp_set_power_state()
531 sdev->system_suspend_target == SOF_SUSPEND_S0IX) in hda_dsp_set_power_state()
538 if (target_state->state == sdev->dsp_power_state.state && in hda_dsp_set_power_state()
539 target_state->substate == sdev->dsp_power_state.substate) in hda_dsp_set_power_state()
543 switch (target_state->state) { in hda_dsp_set_power_state()
548 /* The only allowed transition is: D0I0 -> D3 */ in hda_dsp_set_power_state()
549 if (sdev->dsp_power_state.state == SOF_DSP_PM_D0 && in hda_dsp_set_power_state()
550 sdev->dsp_power_state.substate == SOF_HDA_DSP_PM_D0I0) in hda_dsp_set_power_state()
553 dev_err(sdev->dev, in hda_dsp_set_power_state()
555 sdev->dsp_power_state.state, target_state->state); in hda_dsp_set_power_state()
556 return -EINVAL; in hda_dsp_set_power_state()
558 dev_err(sdev->dev, "error: target state unsupported %d\n", in hda_dsp_set_power_state()
559 target_state->state); in hda_dsp_set_power_state()
560 return -EINVAL; in hda_dsp_set_power_state()
563 dev_err(sdev->dev, in hda_dsp_set_power_state()
565 target_state->state, target_state->substate); in hda_dsp_set_power_state()
569 sdev->dsp_power_state = *target_state; in hda_dsp_set_power_state()
575 * Audio DSP states may transform as below:-
578 * Runtime +---------------------+ Delayed D0i3 work timeout
579 * suspend | +--------------------+
580 * +------------+ D0I0(active) | |
581 * | | <---------------+ |
582 * | +--------> | New IPC | |
583 * | |Runtime +--^--+---------^--+--+ (via mailbox) | |
592 * +-v---+-----------+--v-------+ | | +------+----v----+
593 * | | | +-----------> |
595 * | | +--------------+ |
597 * +----------------------------+ +----------------+
599 * S0IX suspend: The DSP is in D0I3 if any D0I3-compatible streams
606 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in hda_suspend()
607 const struct sof_intel_dsp_desc *chip = hda->desc; in hda_suspend()
627 ret = hda_dsp_core_reset_power_down(sdev, chip->host_managed_cores_mask); in hda_suspend()
629 dev_err(sdev->dev, in hda_suspend()
648 dev_err(sdev->dev, in hda_suspend()
653 /* display codec can powered off after link reset */ in hda_suspend()
667 /* display codec must be powered before link reset */ in hda_resume()
679 dev_err(sdev->dev, in hda_resume()
689 /* turn off the links that were off before suspend */ in hda_resume()
690 list_for_each_entry(hlink, &bus->hlink_list, list) { in hda_resume()
691 if (!hlink->ref_count) in hda_resume()
696 if (!bus->cmd_dma_state) in hda_resume()
709 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in hda_dsp_resume()
710 struct pci_dev *pci = to_pci_dev(sdev->dev); in hda_dsp_resume()
722 if (sdev->dsp_power_state.state == SOF_DSP_PM_D0) { in hda_dsp_resume()
727 list_for_each_entry(hlink, &bus->hlink_list, list) { in hda_dsp_resume()
728 if (hlink->ref_count) { in hda_dsp_resume()
731 dev_dbg(sdev->dev, in hda_dsp_resume()
740 if (bus->cmd_dma_state) in hda_dsp_resume()
747 dev_err(sdev->dev, "error: setting dsp state %d substate %d\n", in hda_dsp_resume()
753 if (hda->l1_support_changed) in hda_dsp_resume()
760 disable_irq_wake(pci->irq); in hda_dsp_resume()
764 /* init hda controller. DSP cores will be powered up during fw boot */ in hda_dsp_resume()
779 /* init hda controller. DSP cores will be powered up during fw boot */ in hda_dsp_runtime_resume()
791 if (hbus->codec_powered) { in hda_dsp_runtime_idle()
792 dev_dbg(sdev->dev, "some codecs still powered (%08X), not idle\n", in hda_dsp_runtime_idle()
793 (unsigned int)hbus->codec_powered); in hda_dsp_runtime_idle()
794 return -EBUSY; in hda_dsp_runtime_idle()
807 /* stop hda controller and power dsp off */ in hda_dsp_runtime_suspend()
817 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in hda_dsp_suspend()
819 struct pci_dev *pci = to_pci_dev(sdev->dev); in hda_dsp_suspend()
828 cancel_delayed_work_sync(&hda->d0i3_work); in hda_dsp_suspend()
837 dev_err(sdev->dev, "error: setting dsp state %d substate %d\n", in hda_dsp_suspend()
844 hda->l1_support_changed = in hda_dsp_suspend()
852 if (bus->cmd_dma_state) in hda_dsp_suspend()
855 /* no link can be powered in s0ix state */ in hda_dsp_suspend()
858 dev_dbg(sdev->dev, in hda_dsp_suspend()
866 enable_irq_wake(pci->irq); in hda_dsp_suspend()
871 /* stop hda controller and power dsp off */ in hda_dsp_suspend()
874 dev_err(bus->dev, "error: suspending dsp\n"); in hda_dsp_suspend()
893 list_for_each_entry(s, &bus->stream_list, list) { in hda_dsp_set_hw_params_upon_resume()
902 if (stream->link_substream) { in hda_dsp_set_hw_params_upon_resume()
903 rtd = asoc_substream_to_rtd(stream->link_substream); in hda_dsp_set_hw_params_upon_resume()
904 name = asoc_rtd_to_codec(rtd, 0)->component->name; in hda_dsp_set_hw_params_upon_resume()
907 return -EINVAL; in hda_dsp_set_hw_params_upon_resume()
909 stream->link_prepared = 0; in hda_dsp_set_hw_params_upon_resume()
911 if (hdac_stream(stream)->direction == in hda_dsp_set_hw_params_upon_resume()
915 stream_tag = hdac_stream(stream)->stream_tag; in hda_dsp_set_hw_params_upon_resume()
928 struct hdac_bus *bus = &hdev->hbus.core; in hda_dsp_d0i3_work()
929 struct snd_sof_dev *sdev = dev_get_drvdata(bus->dev); in hda_dsp_d0i3_work()
935 /* DSP can enter D0I3 iff only D0I3-compatible streams are active */ in hda_dsp_d0i3_work()
948 dev_err_ratelimited(sdev->dev, in hda_dsp_d0i3_work()