Lines Matching +full:playback +full:- +full:sd +full:- +full:lines
1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2011-2017, The Linux Foundation. All rights reserved.
17 .playback = { \
18 .stream_name = pre" TDM"#num" Playback", \
59 .playback = { \
60 .stream_name = #did" Playback", \
122 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); in q6slim_hw_params()
123 struct q6afe_slim_cfg *slim = &dai_data->port_config[dai->id].slim; in q6slim_hw_params()
125 slim->sample_rate = params_rate(params); in q6slim_hw_params()
130 slim->bit_width = 16; in q6slim_hw_params()
133 slim->bit_width = 24; in q6slim_hw_params()
136 slim->bit_width = 32; in q6slim_hw_params()
141 return -EINVAL; in q6slim_hw_params()
151 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); in q6hdmi_hw_params()
153 struct q6afe_hdmi_cfg *hdmi = &dai_data->port_config[dai->id].hdmi; in q6hdmi_hw_params()
155 hdmi->sample_rate = params_rate(params); in q6hdmi_hw_params()
158 hdmi->bit_width = 16; in q6hdmi_hw_params()
161 hdmi->bit_width = 24; in q6hdmi_hw_params()
165 /* HDMI spec CEA-861-E: Table 28 Audio InfoFrame Data Byte 4 */ in q6hdmi_hw_params()
168 hdmi->channel_allocation = 0; in q6hdmi_hw_params()
171 hdmi->channel_allocation = 0x02; in q6hdmi_hw_params()
174 hdmi->channel_allocation = 0x06; in q6hdmi_hw_params()
177 hdmi->channel_allocation = 0x0A; in q6hdmi_hw_params()
180 hdmi->channel_allocation = 0x0B; in q6hdmi_hw_params()
183 hdmi->channel_allocation = 0x12; in q6hdmi_hw_params()
186 hdmi->channel_allocation = 0x13; in q6hdmi_hw_params()
189 dev_err(dai->dev, "invalid Channels = %u\n", channels); in q6hdmi_hw_params()
190 return -EINVAL; in q6hdmi_hw_params()
200 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); in q6i2s_hw_params()
201 struct q6afe_i2s_cfg *i2s = &dai_data->port_config[dai->id].i2s_cfg; in q6i2s_hw_params()
203 i2s->sample_rate = params_rate(params); in q6i2s_hw_params()
204 i2s->bit_width = params_width(params); in q6i2s_hw_params()
205 i2s->num_channels = params_channels(params); in q6i2s_hw_params()
206 i2s->sd_line_mask = dai_data->priv[dai->id].sd_line_mask; in q6i2s_hw_params()
213 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); in q6i2s_set_fmt()
214 struct q6afe_i2s_cfg *i2s = &dai_data->port_config[dai->id].i2s_cfg; in q6i2s_set_fmt()
216 i2s->fmt = fmt; in q6i2s_set_fmt()
227 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); in q6tdm_set_tdm_slot()
228 struct q6afe_tdm_cfg *tdm = &dai_data->port_config[dai->id].tdm; in q6tdm_set_tdm_slot()
234 dev_err(dai->dev, "%s: invalid slot_width %d\n", in q6tdm_set_tdm_slot()
236 return -EINVAL; in q6tdm_set_tdm_slot()
239 /* HW supports 1-32 slots configuration. Typical: 1, 2, 4, 8, 16, 32 */ in q6tdm_set_tdm_slot()
254 dev_err(dai->dev, "%s: invalid slots %d\n", in q6tdm_set_tdm_slot()
256 return -EINVAL; in q6tdm_set_tdm_slot()
259 switch (dai->id) { in q6tdm_set_tdm_slot()
261 tdm->nslots_per_frame = slots; in q6tdm_set_tdm_slot()
262 tdm->slot_width = slot_width; in q6tdm_set_tdm_slot()
264 tdm->slot_mask = (dai->id & 0x1 ? tx_mask : rx_mask) & cap_mask; in q6tdm_set_tdm_slot()
267 dev_err(dai->dev, "%s: invalid dai id 0x%x\n", in q6tdm_set_tdm_slot()
268 __func__, dai->id); in q6tdm_set_tdm_slot()
269 return -EINVAL; in q6tdm_set_tdm_slot()
280 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); in q6tdm_set_channel_map()
281 struct q6afe_tdm_cfg *tdm = &dai_data->port_config[dai->id].tdm; in q6tdm_set_channel_map()
285 switch (dai->id) { in q6tdm_set_channel_map()
287 if (dai->id & 0x1) { in q6tdm_set_channel_map()
289 dev_err(dai->dev, "tx slot not found\n"); in q6tdm_set_channel_map()
290 return -EINVAL; in q6tdm_set_channel_map()
293 dev_err(dai->dev, "invalid tx num %d\n", in q6tdm_set_channel_map()
295 return -EINVAL; in q6tdm_set_channel_map()
299 tdm->ch_mapping[i] = tx_slot[i]; in q6tdm_set_channel_map()
302 tdm->ch_mapping[i] = Q6AFE_CMAP_INVALID; in q6tdm_set_channel_map()
304 tdm->num_channels = tx_num; in q6tdm_set_channel_map()
308 dev_err(dai->dev, "rx slot not found\n"); in q6tdm_set_channel_map()
309 return -EINVAL; in q6tdm_set_channel_map()
312 dev_err(dai->dev, "invalid rx num %d\n", in q6tdm_set_channel_map()
314 return -EINVAL; in q6tdm_set_channel_map()
318 tdm->ch_mapping[i] = rx_slot[i]; in q6tdm_set_channel_map()
321 tdm->ch_mapping[i] = Q6AFE_CMAP_INVALID; in q6tdm_set_channel_map()
323 tdm->num_channels = rx_num; in q6tdm_set_channel_map()
328 dev_err(dai->dev, "%s: invalid dai id 0x%x\n", in q6tdm_set_channel_map()
329 __func__, dai->id); in q6tdm_set_channel_map()
330 return -EINVAL; in q6tdm_set_channel_map()
340 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); in q6tdm_hw_params()
341 struct q6afe_tdm_cfg *tdm = &dai_data->port_config[dai->id].tdm; in q6tdm_hw_params()
343 tdm->bit_width = params_width(params); in q6tdm_hw_params()
344 tdm->sample_rate = params_rate(params); in q6tdm_hw_params()
345 tdm->num_channels = params_channels(params); in q6tdm_hw_params()
346 tdm->data_align_type = dai_data->priv[dai->id].data_align; in q6tdm_hw_params()
347 tdm->sync_src = dai_data->priv[dai->id].sync_src; in q6tdm_hw_params()
348 tdm->sync_mode = dai_data->priv[dai->id].sync_mode; in q6tdm_hw_params()
358 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); in q6dma_set_channel_map()
359 struct q6afe_cdc_dma_cfg *cfg = &dai_data->port_config[dai->id].dma_cfg; in q6dma_set_channel_map()
363 switch (dai->id) { in q6dma_set_channel_map()
377 dev_err(dai->dev, "tx slot not found\n"); in q6dma_set_channel_map()
378 return -EINVAL; in q6dma_set_channel_map()
382 dev_err(dai->dev, "invalid tx num %d\n", in q6dma_set_channel_map()
384 return -EINVAL; in q6dma_set_channel_map()
401 dev_err(dai->dev, "rx slot not found\n"); in q6dma_set_channel_map()
402 return -EINVAL; in q6dma_set_channel_map()
405 dev_err(dai->dev, "invalid rx num %d\n", in q6dma_set_channel_map()
407 return -EINVAL; in q6dma_set_channel_map()
413 dev_err(dai->dev, "%s: invalid dai id 0x%x\n", in q6dma_set_channel_map()
414 __func__, dai->id); in q6dma_set_channel_map()
415 return -EINVAL; in q6dma_set_channel_map()
418 cfg->active_channels_mask = ch_mask; in q6dma_set_channel_map()
427 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); in q6dma_hw_params()
428 struct q6afe_cdc_dma_cfg *cfg = &dai_data->port_config[dai->id].dma_cfg; in q6dma_hw_params()
430 cfg->bit_width = params_width(params); in q6dma_hw_params()
431 cfg->sample_rate = params_rate(params); in q6dma_hw_params()
432 cfg->num_channels = params_channels(params); in q6dma_hw_params()
439 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); in q6afe_dai_shutdown()
442 if (!dai_data->is_port_started[dai->id]) in q6afe_dai_shutdown()
445 rc = q6afe_port_stop(dai_data->port[dai->id]); in q6afe_dai_shutdown()
447 dev_err(dai->dev, "fail to close AFE port (%d)\n", rc); in q6afe_dai_shutdown()
449 dai_data->is_port_started[dai->id] = false; in q6afe_dai_shutdown()
456 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); in q6afe_dai_prepare()
459 if (dai_data->is_port_started[dai->id]) { in q6afe_dai_prepare()
461 rc = q6afe_port_stop(dai_data->port[dai->id]); in q6afe_dai_prepare()
463 dev_err(dai->dev, "fail to close AFE port (%d)\n", rc); in q6afe_dai_prepare()
468 switch (dai->id) { in q6afe_dai_prepare()
471 q6afe_hdmi_port_prepare(dai_data->port[dai->id], in q6afe_dai_prepare()
472 &dai_data->port_config[dai->id].hdmi); in q6afe_dai_prepare()
475 q6afe_slim_port_prepare(dai_data->port[dai->id], in q6afe_dai_prepare()
476 &dai_data->port_config[dai->id].slim); in q6afe_dai_prepare()
479 rc = q6afe_i2s_port_prepare(dai_data->port[dai->id], in q6afe_dai_prepare()
480 &dai_data->port_config[dai->id].i2s_cfg); in q6afe_dai_prepare()
482 dev_err(dai->dev, "fail to prepare AFE port %x\n", in q6afe_dai_prepare()
483 dai->id); in q6afe_dai_prepare()
488 q6afe_tdm_port_prepare(dai_data->port[dai->id], in q6afe_dai_prepare()
489 &dai_data->port_config[dai->id].tdm); in q6afe_dai_prepare()
492 q6afe_cdc_dma_port_prepare(dai_data->port[dai->id], in q6afe_dai_prepare()
493 &dai_data->port_config[dai->id].dma_cfg); in q6afe_dai_prepare()
496 return -EINVAL; in q6afe_dai_prepare()
499 rc = q6afe_port_start(dai_data->port[dai->id]); in q6afe_dai_prepare()
501 dev_err(dai->dev, "fail to start AFE port %x\n", dai->id); in q6afe_dai_prepare()
504 dai_data->is_port_started[dai->id] = true; in q6afe_dai_prepare()
513 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); in q6slim_set_channel_map()
514 struct q6afe_port_config *pcfg = &dai_data->port_config[dai->id]; in q6slim_set_channel_map()
517 if (dai->id & 0x1) { in q6slim_set_channel_map()
521 return -EINVAL; in q6slim_set_channel_map()
525 pcfg->slim.ch_mapping[i] = tx_slot[i]; in q6slim_set_channel_map()
527 pcfg->slim.num_channels = tx_num; in q6slim_set_channel_map()
533 return -EINVAL; in q6slim_set_channel_map()
537 pcfg->slim.ch_mapping[i] = rx_slot[i]; in q6slim_set_channel_map()
539 pcfg->slim.num_channels = rx_num; in q6slim_set_channel_map()
549 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); in q6afe_mi2s_set_sysclk()
550 struct q6afe_port *port = dai_data->port[dai->id]; in q6afe_mi2s_set_sysclk()
579 {"HDMI Playback", NULL, "HDMI_RX"},
580 {"Display Port Playback", NULL, "DISPLAY_PORT_RX"},
581 {"Slimbus Playback", NULL, "SLIMBUS_0_RX"},
582 {"Slimbus1 Playback", NULL, "SLIMBUS_1_RX"},
583 {"Slimbus2 Playback", NULL, "SLIMBUS_2_RX"},
584 {"Slimbus3 Playback", NULL, "SLIMBUS_3_RX"},
585 {"Slimbus4 Playback", NULL, "SLIMBUS_4_RX"},
586 {"Slimbus5 Playback", NULL, "SLIMBUS_5_RX"},
587 {"Slimbus6 Playback", NULL, "SLIMBUS_6_RX"},
597 {"Primary MI2S Playback", NULL, "PRI_MI2S_RX"},
598 {"Secondary MI2S Playback", NULL, "SEC_MI2S_RX"},
599 {"Tertiary MI2S Playback", NULL, "TERT_MI2S_RX"},
600 {"Quaternary MI2S Playback", NULL, "QUAT_MI2S_RX"},
602 {"Primary TDM0 Playback", NULL, "PRIMARY_TDM_RX_0"},
603 {"Primary TDM1 Playback", NULL, "PRIMARY_TDM_RX_1"},
604 {"Primary TDM2 Playback", NULL, "PRIMARY_TDM_RX_2"},
605 {"Primary TDM3 Playback", NULL, "PRIMARY_TDM_RX_3"},
606 {"Primary TDM4 Playback", NULL, "PRIMARY_TDM_RX_4"},
607 {"Primary TDM5 Playback", NULL, "PRIMARY_TDM_RX_5"},
608 {"Primary TDM6 Playback", NULL, "PRIMARY_TDM_RX_6"},
609 {"Primary TDM7 Playback", NULL, "PRIMARY_TDM_RX_7"},
611 {"Secondary TDM0 Playback", NULL, "SEC_TDM_RX_0"},
612 {"Secondary TDM1 Playback", NULL, "SEC_TDM_RX_1"},
613 {"Secondary TDM2 Playback", NULL, "SEC_TDM_RX_2"},
614 {"Secondary TDM3 Playback", NULL, "SEC_TDM_RX_3"},
615 {"Secondary TDM4 Playback", NULL, "SEC_TDM_RX_4"},
616 {"Secondary TDM5 Playback", NULL, "SEC_TDM_RX_5"},
617 {"Secondary TDM6 Playback", NULL, "SEC_TDM_RX_6"},
618 {"Secondary TDM7 Playback", NULL, "SEC_TDM_RX_7"},
620 {"Tertiary TDM0 Playback", NULL, "TERT_TDM_RX_0"},
621 {"Tertiary TDM1 Playback", NULL, "TERT_TDM_RX_1"},
622 {"Tertiary TDM2 Playback", NULL, "TERT_TDM_RX_2"},
623 {"Tertiary TDM3 Playback", NULL, "TERT_TDM_RX_3"},
624 {"Tertiary TDM4 Playback", NULL, "TERT_TDM_RX_4"},
625 {"Tertiary TDM5 Playback", NULL, "TERT_TDM_RX_5"},
626 {"Tertiary TDM6 Playback", NULL, "TERT_TDM_RX_6"},
627 {"Tertiary TDM7 Playback", NULL, "TERT_TDM_RX_7"},
629 {"Quaternary TDM0 Playback", NULL, "QUAT_TDM_RX_0"},
630 {"Quaternary TDM1 Playback", NULL, "QUAT_TDM_RX_1"},
631 {"Quaternary TDM2 Playback", NULL, "QUAT_TDM_RX_2"},
632 {"Quaternary TDM3 Playback", NULL, "QUAT_TDM_RX_3"},
633 {"Quaternary TDM4 Playback", NULL, "QUAT_TDM_RX_4"},
634 {"Quaternary TDM5 Playback", NULL, "QUAT_TDM_RX_5"},
635 {"Quaternary TDM6 Playback", NULL, "QUAT_TDM_RX_6"},
636 {"Quaternary TDM7 Playback", NULL, "QUAT_TDM_RX_7"},
638 {"Quinary TDM0 Playback", NULL, "QUIN_TDM_RX_0"},
639 {"Quinary TDM1 Playback", NULL, "QUIN_TDM_RX_1"},
640 {"Quinary TDM2 Playback", NULL, "QUIN_TDM_RX_2"},
641 {"Quinary TDM3 Playback", NULL, "QUIN_TDM_RX_3"},
642 {"Quinary TDM4 Playback", NULL, "QUIN_TDM_RX_4"},
643 {"Quinary TDM5 Playback", NULL, "QUIN_TDM_RX_5"},
644 {"Quinary TDM6 Playback", NULL, "QUIN_TDM_RX_6"},
645 {"Quinary TDM7 Playback", NULL, "QUIN_TDM_RX_7"},
697 {"WSA_CODEC_DMA_RX_0 Playback", NULL, "WSA_CODEC_DMA_RX_0"},
699 {"WSA_CODEC_DMA_RX_1 Playback", NULL, "WSA_CODEC_DMA_RX_1"},
705 {"RX_CODEC_DMA_RX_0 Playback", NULL, "RX_CODEC_DMA_RX_0"},
707 {"RX_CODEC_DMA_RX_1 Playback", NULL, "RX_CODEC_DMA_RX_1"},
709 {"RX_CODEC_DMA_RX_2 Playback", NULL, "RX_CODEC_DMA_RX_2"},
711 {"RX_CODEC_DMA_RX_3 Playback", NULL, "RX_CODEC_DMA_RX_3"},
713 {"RX_CODEC_DMA_RX_4 Playback", NULL, "RX_CODEC_DMA_RX_4"},
715 {"RX_CODEC_DMA_RX_5 Playback", NULL, "RX_CODEC_DMA_RX_5"},
717 {"RX_CODEC_DMA_RX_6 Playback", NULL, "RX_CODEC_DMA_RX_6"},
718 {"RX_CODEC_DMA_RX_7 Playback", NULL, "RX_CODEC_DMA_RX_7"},
761 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); in msm_dai_q6_dai_probe()
764 port = q6afe_port_get_from_id(dai->dev, dai->id); in msm_dai_q6_dai_probe()
766 dev_err(dai->dev, "Unable to get afe port\n"); in msm_dai_q6_dai_probe()
767 return -EINVAL; in msm_dai_q6_dai_probe()
769 dai_data->port[dai->id] = port; in msm_dai_q6_dai_probe()
776 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); in msm_dai_q6_dai_remove()
778 q6afe_port_put(dai_data->port[dai->id]); in msm_dai_q6_dai_remove()
779 dai_data->port[dai->id] = NULL; in msm_dai_q6_dai_remove()
786 .playback = {
787 .stream_name = "HDMI Playback",
809 .playback = {
810 .stream_name = "Slimbus Playback",
840 .playback = {
841 .stream_name = "Slimbus1 Playback",
876 .playback = {
877 .stream_name = "Slimbus2 Playback",
913 .playback = {
914 .stream_name = "Slimbus3 Playback",
950 .playback = {
951 .stream_name = "Slimbus4 Playback",
987 .playback = {
988 .stream_name = "Slimbus5 Playback",
1024 .playback = {
1025 .stream_name = "Slimbus6 Playback",
1061 .playback = {
1062 .stream_name = "Primary MI2S Playback",
1095 .playback = {
1096 .stream_name = "Secondary MI2S Playback",
1128 .playback = {
1129 .stream_name = "Tertiary MI2S Playback",
1161 .playback = {
1162 .stream_name = "Quaternary MI2S Playback",
1275 .playback = {
1276 .stream_name = "Display Port Playback",
1321 int id = args->args[0]; in q6afe_of_xlate_dai_name()
1322 int ret = -EINVAL; in q6afe_of_xlate_dai_name()
1365 "Secondary MI2S Playback SD1",
1585 .name = "q6afe-dai-component",
1600 for_each_child_of_node(dev->of_node, node) { in of_q6afe_parse_dai_data()
1601 unsigned int lines[Q6AFE_MAX_MI2S_LINES]; in of_q6afe_parse_dai_data() local
1614 priv = &data->priv[id]; in of_q6afe_parse_dai_data()
1616 "qcom,sd-lines", in of_q6afe_parse_dai_data()
1617 lines, 0, in of_q6afe_parse_dai_data()
1624 priv->sd_line_mask = 0; in of_q6afe_parse_dai_data()
1627 priv->sd_line_mask |= BIT(lines[i]); in of_q6afe_parse_dai_data()
1631 priv = &data->priv[id]; in of_q6afe_parse_dai_data()
1632 ret = of_property_read_u32(node, "qcom,tdm-sync-mode", in of_q6afe_parse_dai_data()
1633 &priv->sync_mode); in of_q6afe_parse_dai_data()
1638 ret = of_property_read_u32(node, "qcom,tdm-sync-src", in of_q6afe_parse_dai_data()
1639 &priv->sync_src); in of_q6afe_parse_dai_data()
1644 ret = of_property_read_u32(node, "qcom,tdm-data-out", in of_q6afe_parse_dai_data()
1645 &priv->data_out_enable); in of_q6afe_parse_dai_data()
1650 ret = of_property_read_u32(node, "qcom,tdm-invert-sync", in of_q6afe_parse_dai_data()
1651 &priv->invert_sync); in of_q6afe_parse_dai_data()
1656 ret = of_property_read_u32(node, "qcom,tdm-data-delay", in of_q6afe_parse_dai_data()
1657 &priv->data_delay); in of_q6afe_parse_dai_data()
1662 ret = of_property_read_u32(node, "qcom,tdm-data-align", in of_q6afe_parse_dai_data()
1663 &priv->data_align); in of_q6afe_parse_dai_data()
1678 struct device *dev = &pdev->dev; in q6afe_dai_dev_probe()
1682 return -ENOMEM; in q6afe_dai_dev_probe()
1694 { .compatible = "qcom,q6afe-dais" },
1702 .name = "q6afe-dai",