Lines Matching +full:capture +full:- +full:sd +full:- +full:lines
1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2011-2017, The Linux Foundation. All rights reserved.
38 .capture = { \
39 .stream_name = pre" TDM"#num" Capture", \
80 .capture = { \
81 .stream_name = #did" Capture", \
122 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); in q6slim_hw_params()
123 struct q6afe_slim_cfg *slim = &dai_data->port_config[dai->id].slim; in q6slim_hw_params()
125 slim->sample_rate = params_rate(params); in q6slim_hw_params()
130 slim->bit_width = 16; in q6slim_hw_params()
133 slim->bit_width = 24; in q6slim_hw_params()
136 slim->bit_width = 32; in q6slim_hw_params()
141 return -EINVAL; in q6slim_hw_params()
151 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); in q6hdmi_hw_params()
153 struct q6afe_hdmi_cfg *hdmi = &dai_data->port_config[dai->id].hdmi; in q6hdmi_hw_params()
155 hdmi->sample_rate = params_rate(params); in q6hdmi_hw_params()
158 hdmi->bit_width = 16; in q6hdmi_hw_params()
161 hdmi->bit_width = 24; in q6hdmi_hw_params()
165 /* HDMI spec CEA-861-E: Table 28 Audio InfoFrame Data Byte 4 */ in q6hdmi_hw_params()
168 hdmi->channel_allocation = 0; in q6hdmi_hw_params()
171 hdmi->channel_allocation = 0x02; in q6hdmi_hw_params()
174 hdmi->channel_allocation = 0x06; in q6hdmi_hw_params()
177 hdmi->channel_allocation = 0x0A; in q6hdmi_hw_params()
180 hdmi->channel_allocation = 0x0B; in q6hdmi_hw_params()
183 hdmi->channel_allocation = 0x12; in q6hdmi_hw_params()
186 hdmi->channel_allocation = 0x13; in q6hdmi_hw_params()
189 dev_err(dai->dev, "invalid Channels = %u\n", channels); in q6hdmi_hw_params()
190 return -EINVAL; in q6hdmi_hw_params()
200 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); in q6i2s_hw_params()
201 struct q6afe_i2s_cfg *i2s = &dai_data->port_config[dai->id].i2s_cfg; in q6i2s_hw_params()
203 i2s->sample_rate = params_rate(params); in q6i2s_hw_params()
204 i2s->bit_width = params_width(params); in q6i2s_hw_params()
205 i2s->num_channels = params_channels(params); in q6i2s_hw_params()
206 i2s->sd_line_mask = dai_data->priv[dai->id].sd_line_mask; in q6i2s_hw_params()
213 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); in q6i2s_set_fmt()
214 struct q6afe_i2s_cfg *i2s = &dai_data->port_config[dai->id].i2s_cfg; in q6i2s_set_fmt()
216 i2s->fmt = fmt; in q6i2s_set_fmt()
227 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); in q6tdm_set_tdm_slot()
228 struct q6afe_tdm_cfg *tdm = &dai_data->port_config[dai->id].tdm; in q6tdm_set_tdm_slot()
234 dev_err(dai->dev, "%s: invalid slot_width %d\n", in q6tdm_set_tdm_slot()
236 return -EINVAL; in q6tdm_set_tdm_slot()
239 /* HW supports 1-32 slots configuration. Typical: 1, 2, 4, 8, 16, 32 */ in q6tdm_set_tdm_slot()
254 dev_err(dai->dev, "%s: invalid slots %d\n", in q6tdm_set_tdm_slot()
256 return -EINVAL; in q6tdm_set_tdm_slot()
259 switch (dai->id) { in q6tdm_set_tdm_slot()
261 tdm->nslots_per_frame = slots; in q6tdm_set_tdm_slot()
262 tdm->slot_width = slot_width; in q6tdm_set_tdm_slot()
264 tdm->slot_mask = (dai->id & 0x1 ? tx_mask : rx_mask) & cap_mask; in q6tdm_set_tdm_slot()
267 dev_err(dai->dev, "%s: invalid dai id 0x%x\n", in q6tdm_set_tdm_slot()
268 __func__, dai->id); in q6tdm_set_tdm_slot()
269 return -EINVAL; in q6tdm_set_tdm_slot()
280 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); in q6tdm_set_channel_map()
281 struct q6afe_tdm_cfg *tdm = &dai_data->port_config[dai->id].tdm; in q6tdm_set_channel_map()
285 switch (dai->id) { in q6tdm_set_channel_map()
287 if (dai->id & 0x1) { in q6tdm_set_channel_map()
289 dev_err(dai->dev, "tx slot not found\n"); in q6tdm_set_channel_map()
290 return -EINVAL; in q6tdm_set_channel_map()
293 dev_err(dai->dev, "invalid tx num %d\n", in q6tdm_set_channel_map()
295 return -EINVAL; in q6tdm_set_channel_map()
299 tdm->ch_mapping[i] = tx_slot[i]; in q6tdm_set_channel_map()
302 tdm->ch_mapping[i] = Q6AFE_CMAP_INVALID; in q6tdm_set_channel_map()
304 tdm->num_channels = tx_num; in q6tdm_set_channel_map()
308 dev_err(dai->dev, "rx slot not found\n"); in q6tdm_set_channel_map()
309 return -EINVAL; in q6tdm_set_channel_map()
312 dev_err(dai->dev, "invalid rx num %d\n", in q6tdm_set_channel_map()
314 return -EINVAL; in q6tdm_set_channel_map()
318 tdm->ch_mapping[i] = rx_slot[i]; in q6tdm_set_channel_map()
321 tdm->ch_mapping[i] = Q6AFE_CMAP_INVALID; in q6tdm_set_channel_map()
323 tdm->num_channels = rx_num; in q6tdm_set_channel_map()
328 dev_err(dai->dev, "%s: invalid dai id 0x%x\n", in q6tdm_set_channel_map()
329 __func__, dai->id); in q6tdm_set_channel_map()
330 return -EINVAL; in q6tdm_set_channel_map()
340 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); in q6tdm_hw_params()
341 struct q6afe_tdm_cfg *tdm = &dai_data->port_config[dai->id].tdm; in q6tdm_hw_params()
343 tdm->bit_width = params_width(params); in q6tdm_hw_params()
344 tdm->sample_rate = params_rate(params); in q6tdm_hw_params()
345 tdm->num_channels = params_channels(params); in q6tdm_hw_params()
346 tdm->data_align_type = dai_data->priv[dai->id].data_align; in q6tdm_hw_params()
347 tdm->sync_src = dai_data->priv[dai->id].sync_src; in q6tdm_hw_params()
348 tdm->sync_mode = dai_data->priv[dai->id].sync_mode; in q6tdm_hw_params()
358 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); in q6dma_set_channel_map()
359 struct q6afe_cdc_dma_cfg *cfg = &dai_data->port_config[dai->id].dma_cfg; in q6dma_set_channel_map()
363 switch (dai->id) { in q6dma_set_channel_map()
377 dev_err(dai->dev, "tx slot not found\n"); in q6dma_set_channel_map()
378 return -EINVAL; in q6dma_set_channel_map()
382 dev_err(dai->dev, "invalid tx num %d\n", in q6dma_set_channel_map()
384 return -EINVAL; in q6dma_set_channel_map()
401 dev_err(dai->dev, "rx slot not found\n"); in q6dma_set_channel_map()
402 return -EINVAL; in q6dma_set_channel_map()
405 dev_err(dai->dev, "invalid rx num %d\n", in q6dma_set_channel_map()
407 return -EINVAL; in q6dma_set_channel_map()
413 dev_err(dai->dev, "%s: invalid dai id 0x%x\n", in q6dma_set_channel_map()
414 __func__, dai->id); in q6dma_set_channel_map()
415 return -EINVAL; in q6dma_set_channel_map()
418 cfg->active_channels_mask = ch_mask; in q6dma_set_channel_map()
427 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); in q6dma_hw_params()
428 struct q6afe_cdc_dma_cfg *cfg = &dai_data->port_config[dai->id].dma_cfg; in q6dma_hw_params()
430 cfg->bit_width = params_width(params); in q6dma_hw_params()
431 cfg->sample_rate = params_rate(params); in q6dma_hw_params()
432 cfg->num_channels = params_channels(params); in q6dma_hw_params()
439 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); in q6afe_dai_shutdown()
442 if (!dai_data->is_port_started[dai->id]) in q6afe_dai_shutdown()
445 rc = q6afe_port_stop(dai_data->port[dai->id]); in q6afe_dai_shutdown()
447 dev_err(dai->dev, "fail to close AFE port (%d)\n", rc); in q6afe_dai_shutdown()
449 dai_data->is_port_started[dai->id] = false; in q6afe_dai_shutdown()
456 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); in q6afe_dai_prepare()
459 if (dai_data->is_port_started[dai->id]) { in q6afe_dai_prepare()
461 rc = q6afe_port_stop(dai_data->port[dai->id]); in q6afe_dai_prepare()
463 dev_err(dai->dev, "fail to close AFE port (%d)\n", rc); in q6afe_dai_prepare()
468 switch (dai->id) { in q6afe_dai_prepare()
471 q6afe_hdmi_port_prepare(dai_data->port[dai->id], in q6afe_dai_prepare()
472 &dai_data->port_config[dai->id].hdmi); in q6afe_dai_prepare()
475 q6afe_slim_port_prepare(dai_data->port[dai->id], in q6afe_dai_prepare()
476 &dai_data->port_config[dai->id].slim); in q6afe_dai_prepare()
479 rc = q6afe_i2s_port_prepare(dai_data->port[dai->id], in q6afe_dai_prepare()
480 &dai_data->port_config[dai->id].i2s_cfg); in q6afe_dai_prepare()
482 dev_err(dai->dev, "fail to prepare AFE port %x\n", in q6afe_dai_prepare()
483 dai->id); in q6afe_dai_prepare()
488 q6afe_tdm_port_prepare(dai_data->port[dai->id], in q6afe_dai_prepare()
489 &dai_data->port_config[dai->id].tdm); in q6afe_dai_prepare()
492 q6afe_cdc_dma_port_prepare(dai_data->port[dai->id], in q6afe_dai_prepare()
493 &dai_data->port_config[dai->id].dma_cfg); in q6afe_dai_prepare()
496 return -EINVAL; in q6afe_dai_prepare()
499 rc = q6afe_port_start(dai_data->port[dai->id]); in q6afe_dai_prepare()
501 dev_err(dai->dev, "fail to start AFE port %x\n", dai->id); in q6afe_dai_prepare()
504 dai_data->is_port_started[dai->id] = true; in q6afe_dai_prepare()
513 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); in q6slim_set_channel_map()
514 struct q6afe_port_config *pcfg = &dai_data->port_config[dai->id]; in q6slim_set_channel_map()
517 if (dai->id & 0x1) { in q6slim_set_channel_map()
521 return -EINVAL; in q6slim_set_channel_map()
525 pcfg->slim.ch_mapping[i] = tx_slot[i]; in q6slim_set_channel_map()
527 pcfg->slim.num_channels = tx_num; in q6slim_set_channel_map()
533 return -EINVAL; in q6slim_set_channel_map()
537 pcfg->slim.ch_mapping[i] = rx_slot[i]; in q6slim_set_channel_map()
539 pcfg->slim.num_channels = rx_num; in q6slim_set_channel_map()
549 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); in q6afe_mi2s_set_sysclk()
550 struct q6afe_port *port = dai_data->port[dai->id]; in q6afe_mi2s_set_sysclk()
589 {"SLIMBUS_0_TX", NULL, "Slimbus Capture"},
590 {"SLIMBUS_1_TX", NULL, "Slimbus1 Capture"},
591 {"SLIMBUS_2_TX", NULL, "Slimbus2 Capture"},
592 {"SLIMBUS_3_TX", NULL, "Slimbus3 Capture"},
593 {"SLIMBUS_4_TX", NULL, "Slimbus4 Capture"},
594 {"SLIMBUS_5_TX", NULL, "Slimbus5 Capture"},
595 {"SLIMBUS_6_TX", NULL, "Slimbus6 Capture"},
647 {"PRIMARY_TDM_TX_0", NULL, "Primary TDM0 Capture"},
648 {"PRIMARY_TDM_TX_1", NULL, "Primary TDM1 Capture"},
649 {"PRIMARY_TDM_TX_2", NULL, "Primary TDM2 Capture"},
650 {"PRIMARY_TDM_TX_3", NULL, "Primary TDM3 Capture"},
651 {"PRIMARY_TDM_TX_4", NULL, "Primary TDM4 Capture"},
652 {"PRIMARY_TDM_TX_5", NULL, "Primary TDM5 Capture"},
653 {"PRIMARY_TDM_TX_6", NULL, "Primary TDM6 Capture"},
654 {"PRIMARY_TDM_TX_7", NULL, "Primary TDM7 Capture"},
656 {"SEC_TDM_TX_0", NULL, "Secondary TDM0 Capture"},
657 {"SEC_TDM_TX_1", NULL, "Secondary TDM1 Capture"},
658 {"SEC_TDM_TX_2", NULL, "Secondary TDM2 Capture"},
659 {"SEC_TDM_TX_3", NULL, "Secondary TDM3 Capture"},
660 {"SEC_TDM_TX_4", NULL, "Secondary TDM4 Capture"},
661 {"SEC_TDM_TX_5", NULL, "Secondary TDM5 Capture"},
662 {"SEC_TDM_TX_6", NULL, "Secondary TDM6 Capture"},
663 {"SEC_TDM_TX_7", NULL, "Secondary TDM7 Capture"},
665 {"TERT_TDM_TX_0", NULL, "Tertiary TDM0 Capture"},
666 {"TERT_TDM_TX_1", NULL, "Tertiary TDM1 Capture"},
667 {"TERT_TDM_TX_2", NULL, "Tertiary TDM2 Capture"},
668 {"TERT_TDM_TX_3", NULL, "Tertiary TDM3 Capture"},
669 {"TERT_TDM_TX_4", NULL, "Tertiary TDM4 Capture"},
670 {"TERT_TDM_TX_5", NULL, "Tertiary TDM5 Capture"},
671 {"TERT_TDM_TX_6", NULL, "Tertiary TDM6 Capture"},
672 {"TERT_TDM_TX_7", NULL, "Tertiary TDM7 Capture"},
674 {"QUAT_TDM_TX_0", NULL, "Quaternary TDM0 Capture"},
675 {"QUAT_TDM_TX_1", NULL, "Quaternary TDM1 Capture"},
676 {"QUAT_TDM_TX_2", NULL, "Quaternary TDM2 Capture"},
677 {"QUAT_TDM_TX_3", NULL, "Quaternary TDM3 Capture"},
678 {"QUAT_TDM_TX_4", NULL, "Quaternary TDM4 Capture"},
679 {"QUAT_TDM_TX_5", NULL, "Quaternary TDM5 Capture"},
680 {"QUAT_TDM_TX_6", NULL, "Quaternary TDM6 Capture"},
681 {"QUAT_TDM_TX_7", NULL, "Quaternary TDM7 Capture"},
683 {"QUIN_TDM_TX_0", NULL, "Quinary TDM0 Capture"},
684 {"QUIN_TDM_TX_1", NULL, "Quinary TDM1 Capture"},
685 {"QUIN_TDM_TX_2", NULL, "Quinary TDM2 Capture"},
686 {"QUIN_TDM_TX_3", NULL, "Quinary TDM3 Capture"},
687 {"QUIN_TDM_TX_4", NULL, "Quinary TDM4 Capture"},
688 {"QUIN_TDM_TX_5", NULL, "Quinary TDM5 Capture"},
689 {"QUIN_TDM_TX_6", NULL, "Quinary TDM6 Capture"},
690 {"QUIN_TDM_TX_7", NULL, "Quinary TDM7 Capture"},
692 {"TERT_MI2S_TX", NULL, "Tertiary MI2S Capture"},
693 {"PRI_MI2S_TX", NULL, "Primary MI2S Capture"},
694 {"SEC_MI2S_TX", NULL, "Secondary MI2S Capture"},
695 {"QUAT_MI2S_TX", NULL, "Quaternary MI2S Capture"},
698 {"WSA_CODEC_DMA_TX_0", NULL, "WSA_CODEC_DMA_TX_0 Capture"},
700 {"WSA_CODEC_DMA_TX_1", NULL, "WSA_CODEC_DMA_TX_1 Capture"},
701 {"WSA_CODEC_DMA_TX_2", NULL, "WSA_CODEC_DMA_TX_2 Capture"},
702 {"VA_CODEC_DMA_TX_0", NULL, "VA_CODEC_DMA_TX_0 Capture"},
703 {"VA_CODEC_DMA_TX_1", NULL, "VA_CODEC_DMA_TX_1 Capture"},
704 {"VA_CODEC_DMA_TX_2", NULL, "VA_CODEC_DMA_TX_2 Capture"},
706 {"TX_CODEC_DMA_TX_0", NULL, "TX_CODEC_DMA_TX_0 Capture"},
708 {"TX_CODEC_DMA_TX_1", NULL, "TX_CODEC_DMA_TX_1 Capture"},
710 {"TX_CODEC_DMA_TX_2", NULL, "TX_CODEC_DMA_TX_2 Capture"},
712 {"TX_CODEC_DMA_TX_3", NULL, "TX_CODEC_DMA_TX_3 Capture"},
714 {"TX_CODEC_DMA_TX_4", NULL, "TX_CODEC_DMA_TX_4 Capture"},
716 {"TX_CODEC_DMA_TX_5", NULL, "TX_CODEC_DMA_TX_5 Capture"},
761 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); in msm_dai_q6_dai_probe()
764 port = q6afe_port_get_from_id(dai->dev, dai->id); in msm_dai_q6_dai_probe()
766 dev_err(dai->dev, "Unable to get afe port\n"); in msm_dai_q6_dai_probe()
767 return -EINVAL; in msm_dai_q6_dai_probe()
769 dai_data->port[dai->id] = port; in msm_dai_q6_dai_probe()
776 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); in msm_dai_q6_dai_remove()
778 q6afe_port_put(dai_data->port[dai->id]); in msm_dai_q6_dai_remove()
779 dai_data->port[dai->id] = NULL; in msm_dai_q6_dai_remove()
827 .capture = {
828 .stream_name = "Slimbus Capture",
863 .capture = {
864 .stream_name = "Slimbus1 Capture",
900 .capture = {
901 .stream_name = "Slimbus2 Capture",
937 .capture = {
938 .stream_name = "Slimbus3 Capture",
974 .capture = {
975 .stream_name = "Slimbus4 Capture",
1011 .capture = {
1012 .stream_name = "Slimbus5 Capture",
1048 .capture = {
1049 .stream_name = "Slimbus6 Capture",
1078 .capture = {
1079 .stream_name = "Primary MI2S Capture",
1111 .capture = {
1112 .stream_name = "Secondary MI2S Capture",
1144 .capture = {
1145 .stream_name = "Tertiary MI2S Capture",
1177 .capture = {
1178 .stream_name = "Quaternary MI2S Capture",
1321 int id = args->args[0]; in q6afe_of_xlate_dai_name()
1322 int ret = -EINVAL; in q6afe_of_xlate_dai_name()
1585 .name = "q6afe-dai-component",
1600 for_each_child_of_node(dev->of_node, node) { in of_q6afe_parse_dai_data()
1601 unsigned int lines[Q6AFE_MAX_MI2S_LINES]; in of_q6afe_parse_dai_data() local
1614 priv = &data->priv[id]; in of_q6afe_parse_dai_data()
1616 "qcom,sd-lines", in of_q6afe_parse_dai_data()
1617 lines, 0, in of_q6afe_parse_dai_data()
1624 priv->sd_line_mask = 0; in of_q6afe_parse_dai_data()
1627 priv->sd_line_mask |= BIT(lines[i]); in of_q6afe_parse_dai_data()
1631 priv = &data->priv[id]; in of_q6afe_parse_dai_data()
1632 ret = of_property_read_u32(node, "qcom,tdm-sync-mode", in of_q6afe_parse_dai_data()
1633 &priv->sync_mode); in of_q6afe_parse_dai_data()
1638 ret = of_property_read_u32(node, "qcom,tdm-sync-src", in of_q6afe_parse_dai_data()
1639 &priv->sync_src); in of_q6afe_parse_dai_data()
1644 ret = of_property_read_u32(node, "qcom,tdm-data-out", in of_q6afe_parse_dai_data()
1645 &priv->data_out_enable); in of_q6afe_parse_dai_data()
1650 ret = of_property_read_u32(node, "qcom,tdm-invert-sync", in of_q6afe_parse_dai_data()
1651 &priv->invert_sync); in of_q6afe_parse_dai_data()
1656 ret = of_property_read_u32(node, "qcom,tdm-data-delay", in of_q6afe_parse_dai_data()
1657 &priv->data_delay); in of_q6afe_parse_dai_data()
1662 ret = of_property_read_u32(node, "qcom,tdm-data-align", in of_q6afe_parse_dai_data()
1663 &priv->data_align); in of_q6afe_parse_dai_data()
1678 struct device *dev = &pdev->dev; in q6afe_dai_dev_probe()
1682 return -ENOMEM; in q6afe_dai_dev_probe()
1694 { .compatible = "qcom,q6afe-dais" },
1702 .name = "q6afe-dai",