Lines Matching +full:playback +full:- +full:sd +full:- +full:lines
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2010-2011,2013-2015 The Linux Foundation. All rights reserved.
5 * lpass-cpu.c -- ALSA SoC CPU DAI driver for QTi LPASS
18 #include <sound/soc-dai.h>
19 #include "lpass-lpaif-reg.h"
36 struct lpass_variant *v = drvdata->variant; in lpass_cpu_init_i2sctl_bitfields()
38 i2sctl->loopback = devm_regmap_field_alloc(dev, map, v->loopback); in lpass_cpu_init_i2sctl_bitfields()
39 i2sctl->spken = devm_regmap_field_alloc(dev, map, v->spken); in lpass_cpu_init_i2sctl_bitfields()
40 i2sctl->spkmode = devm_regmap_field_alloc(dev, map, v->spkmode); in lpass_cpu_init_i2sctl_bitfields()
41 i2sctl->spkmono = devm_regmap_field_alloc(dev, map, v->spkmono); in lpass_cpu_init_i2sctl_bitfields()
42 i2sctl->micen = devm_regmap_field_alloc(dev, map, v->micen); in lpass_cpu_init_i2sctl_bitfields()
43 i2sctl->micmode = devm_regmap_field_alloc(dev, map, v->micmode); in lpass_cpu_init_i2sctl_bitfields()
44 i2sctl->micmono = devm_regmap_field_alloc(dev, map, v->micmono); in lpass_cpu_init_i2sctl_bitfields()
45 i2sctl->wssrc = devm_regmap_field_alloc(dev, map, v->wssrc); in lpass_cpu_init_i2sctl_bitfields()
46 i2sctl->bitwidth = devm_regmap_field_alloc(dev, map, v->bitwidth); in lpass_cpu_init_i2sctl_bitfields()
48 if (IS_ERR(i2sctl->loopback) || IS_ERR(i2sctl->spken) || in lpass_cpu_init_i2sctl_bitfields()
49 IS_ERR(i2sctl->spkmode) || IS_ERR(i2sctl->spkmono) || in lpass_cpu_init_i2sctl_bitfields()
50 IS_ERR(i2sctl->micen) || IS_ERR(i2sctl->micmode) || in lpass_cpu_init_i2sctl_bitfields()
51 IS_ERR(i2sctl->micmono) || IS_ERR(i2sctl->wssrc) || in lpass_cpu_init_i2sctl_bitfields()
52 IS_ERR(i2sctl->bitwidth)) in lpass_cpu_init_i2sctl_bitfields()
53 return -EINVAL; in lpass_cpu_init_i2sctl_bitfields()
64 ret = clk_set_rate(drvdata->mi2s_osr_clk[dai->driver->id], freq); in lpass_cpu_daiops_set_sysclk()
66 dev_err(dai->dev, "error setting mi2s osrclk to %u: %d\n", in lpass_cpu_daiops_set_sysclk()
78 ret = clk_prepare_enable(drvdata->mi2s_osr_clk[dai->driver->id]); in lpass_cpu_daiops_startup()
80 dev_err(dai->dev, "error in enabling mi2s osr clk: %d\n", ret); in lpass_cpu_daiops_startup()
83 ret = clk_prepare(drvdata->mi2s_bit_clk[dai->driver->id]); in lpass_cpu_daiops_startup()
85 dev_err(dai->dev, "error in enabling mi2s bit clk: %d\n", ret); in lpass_cpu_daiops_startup()
86 clk_disable_unprepare(drvdata->mi2s_osr_clk[dai->driver->id]); in lpass_cpu_daiops_startup()
97 clk_disable_unprepare(drvdata->mi2s_osr_clk[dai->driver->id]); in lpass_cpu_daiops_shutdown()
98 clk_unprepare(drvdata->mi2s_bit_clk[dai->driver->id]); in lpass_cpu_daiops_shutdown()
105 struct lpaif_i2sctl *i2sctl = drvdata->i2sctl; in lpass_cpu_daiops_hw_params()
106 unsigned int id = dai->driver->id; in lpass_cpu_daiops_hw_params()
116 dev_err(dai->dev, "invalid bit width given: %d\n", bitwidth); in lpass_cpu_daiops_hw_params()
120 ret = regmap_fields_write(i2sctl->loopback, id, in lpass_cpu_daiops_hw_params()
123 dev_err(dai->dev, "error updating loopback field: %d\n", ret); in lpass_cpu_daiops_hw_params()
127 ret = regmap_fields_write(i2sctl->wssrc, id, in lpass_cpu_daiops_hw_params()
130 dev_err(dai->dev, "error updating wssrc field: %d\n", ret); in lpass_cpu_daiops_hw_params()
145 dev_err(dai->dev, "invalid bitwidth given: %d\n", bitwidth); in lpass_cpu_daiops_hw_params()
146 return -EINVAL; in lpass_cpu_daiops_hw_params()
149 ret = regmap_fields_write(i2sctl->bitwidth, id, regval); in lpass_cpu_daiops_hw_params()
151 dev_err(dai->dev, "error updating bitwidth field: %d\n", ret); in lpass_cpu_daiops_hw_params()
155 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) in lpass_cpu_daiops_hw_params()
156 mode = drvdata->mi2s_playback_sd_mode[id]; in lpass_cpu_daiops_hw_params()
158 mode = drvdata->mi2s_capture_sd_mode[id]; in lpass_cpu_daiops_hw_params()
161 dev_err(dai->dev, "no line is assigned\n"); in lpass_cpu_daiops_hw_params()
162 return -EINVAL; in lpass_cpu_daiops_hw_params()
182 dev_err(dai->dev, "cannot configure 4 channels with mode %d\n", in lpass_cpu_daiops_hw_params()
184 return -EINVAL; in lpass_cpu_daiops_hw_params()
196 dev_err(dai->dev, "cannot configure 6 channels with mode %d\n", in lpass_cpu_daiops_hw_params()
198 return -EINVAL; in lpass_cpu_daiops_hw_params()
209 dev_err(dai->dev, "cannot configure 8 channels with mode %d\n", in lpass_cpu_daiops_hw_params()
211 return -EINVAL; in lpass_cpu_daiops_hw_params()
215 dev_err(dai->dev, "invalid channels given: %u\n", channels); in lpass_cpu_daiops_hw_params()
216 return -EINVAL; in lpass_cpu_daiops_hw_params()
219 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { in lpass_cpu_daiops_hw_params()
220 ret = regmap_fields_write(i2sctl->spkmode, id, in lpass_cpu_daiops_hw_params()
223 dev_err(dai->dev, "error writing to i2sctl spkr mode: %d\n", in lpass_cpu_daiops_hw_params()
228 ret = regmap_fields_write(i2sctl->spkmono, id, in lpass_cpu_daiops_hw_params()
231 ret = regmap_fields_write(i2sctl->spkmono, id, in lpass_cpu_daiops_hw_params()
234 ret = regmap_fields_write(i2sctl->micmode, id, in lpass_cpu_daiops_hw_params()
237 dev_err(dai->dev, "error writing to i2sctl mic mode: %d\n", in lpass_cpu_daiops_hw_params()
242 ret = regmap_fields_write(i2sctl->micmono, id, in lpass_cpu_daiops_hw_params()
245 ret = regmap_fields_write(i2sctl->micmono, id, in lpass_cpu_daiops_hw_params()
250 dev_err(dai->dev, "error writing to i2sctl channels mode: %d\n", in lpass_cpu_daiops_hw_params()
255 ret = clk_set_rate(drvdata->mi2s_bit_clk[id], in lpass_cpu_daiops_hw_params()
258 dev_err(dai->dev, "error setting mi2s bitclk to %u: %d\n", in lpass_cpu_daiops_hw_params()
270 struct lpaif_i2sctl *i2sctl = drvdata->i2sctl; in lpass_cpu_daiops_trigger()
271 unsigned int id = dai->driver->id; in lpass_cpu_daiops_trigger()
272 int ret = -EINVAL; in lpass_cpu_daiops_trigger()
275 ret = regmap_read(drvdata->lpaif_map, in lpass_cpu_daiops_trigger()
276 LPAIF_I2SCTL_REG(drvdata->variant, dai->driver->id), &val); in lpass_cpu_daiops_trigger()
278 dev_err(dai->dev, "error reading from i2sctl reg: %d\n", ret); in lpass_cpu_daiops_trigger()
282 dev_err(dai->dev, "error in i2sctl register state\n"); in lpass_cpu_daiops_trigger()
283 return -ENOTRECOVERABLE; in lpass_cpu_daiops_trigger()
290 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { in lpass_cpu_daiops_trigger()
291 ret = regmap_fields_write(i2sctl->spken, id, in lpass_cpu_daiops_trigger()
294 ret = regmap_fields_write(i2sctl->micen, id, in lpass_cpu_daiops_trigger()
298 dev_err(dai->dev, "error writing to i2sctl reg: %d\n", in lpass_cpu_daiops_trigger()
301 if (drvdata->bit_clk_state[id] == LPAIF_BIT_CLK_DISABLE) { in lpass_cpu_daiops_trigger()
302 ret = clk_enable(drvdata->mi2s_bit_clk[id]); in lpass_cpu_daiops_trigger()
304 dev_err(dai->dev, "error in enabling mi2s bit clk: %d\n", ret); in lpass_cpu_daiops_trigger()
305 clk_disable(drvdata->mi2s_osr_clk[id]); in lpass_cpu_daiops_trigger()
308 drvdata->bit_clk_state[id] = LPAIF_BIT_CLK_ENABLE; in lpass_cpu_daiops_trigger()
315 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { in lpass_cpu_daiops_trigger()
316 ret = regmap_fields_write(i2sctl->spken, id, in lpass_cpu_daiops_trigger()
319 ret = regmap_fields_write(i2sctl->micen, id, in lpass_cpu_daiops_trigger()
323 dev_err(dai->dev, "error writing to i2sctl reg: %d\n", in lpass_cpu_daiops_trigger()
325 if (drvdata->bit_clk_state[id] == LPAIF_BIT_CLK_ENABLE) { in lpass_cpu_daiops_trigger()
326 clk_disable(drvdata->mi2s_bit_clk[dai->driver->id]); in lpass_cpu_daiops_trigger()
327 drvdata->bit_clk_state[id] = LPAIF_BIT_CLK_DISABLE; in lpass_cpu_daiops_trigger()
350 ret = regmap_write(drvdata->lpaif_map, in asoc_qcom_lpass_cpu_dai_probe()
351 LPAIF_I2SCTL_REG(drvdata->variant, dai->driver->id), 0); in asoc_qcom_lpass_cpu_dai_probe()
353 dev_err(dai->dev, "error writing to i2sctl reg: %d\n", ret); in asoc_qcom_lpass_cpu_dai_probe()
360 .name = "lpass-cpu",
366 struct lpass_variant *v = drvdata->variant; in lpass_cpu_regmap_writeable()
369 for (i = 0; i < v->i2s_ports; ++i) in lpass_cpu_regmap_writeable()
373 for (i = 0; i < v->irq_ports; ++i) { in lpass_cpu_regmap_writeable()
380 for (i = 0; i < v->rdma_channels; ++i) { in lpass_cpu_regmap_writeable()
391 for (i = 0; i < v->wrdma_channels; ++i) { in lpass_cpu_regmap_writeable()
392 if (reg == LPAIF_WRDMACTL_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_writeable()
394 if (reg == LPAIF_WRDMABASE_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_writeable()
396 if (reg == LPAIF_WRDMABUFF_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_writeable()
398 if (reg == LPAIF_WRDMAPER_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_writeable()
408 struct lpass_variant *v = drvdata->variant; in lpass_cpu_regmap_readable()
411 for (i = 0; i < v->i2s_ports; ++i) in lpass_cpu_regmap_readable()
415 for (i = 0; i < v->irq_ports; ++i) { in lpass_cpu_regmap_readable()
422 for (i = 0; i < v->rdma_channels; ++i) { in lpass_cpu_regmap_readable()
435 for (i = 0; i < v->wrdma_channels; ++i) { in lpass_cpu_regmap_readable()
436 if (reg == LPAIF_WRDMACTL_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_readable()
438 if (reg == LPAIF_WRDMABASE_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_readable()
440 if (reg == LPAIF_WRDMABUFF_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_readable()
442 if (reg == LPAIF_WRDMACURR_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_readable()
444 if (reg == LPAIF_WRDMAPER_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_readable()
454 struct lpass_variant *v = drvdata->variant; in lpass_cpu_regmap_volatile()
457 for (i = 0; i < v->i2s_ports; ++i) in lpass_cpu_regmap_volatile()
460 for (i = 0; i < v->irq_ports; ++i) in lpass_cpu_regmap_volatile()
464 for (i = 0; i < v->rdma_channels; ++i) in lpass_cpu_regmap_volatile()
468 for (i = 0; i < v->wrdma_channels; ++i) in lpass_cpu_regmap_volatile()
469 if (reg == LPAIF_WRDMACURR_REG(v, i + v->wrdma_channel_start) || in lpass_cpu_regmap_volatile()
470 reg == LPAIF_WRDMACTL_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_volatile()
489 struct lpass_variant *v = drvdata->variant; in lpass_hdmi_init_bitfields()
504 return -ENOMEM; in lpass_hdmi_init_bitfields()
506 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->soft_reset, tx_ctl->soft_reset); in lpass_hdmi_init_bitfields()
507 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->force_reset, tx_ctl->force_reset); in lpass_hdmi_init_bitfields()
508 drvdata->tx_ctl = tx_ctl; in lpass_hdmi_init_bitfields()
510 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->legacy_en, legacy_en); in lpass_hdmi_init_bitfields()
511 drvdata->hdmitx_legacy_en = legacy_en; in lpass_hdmi_init_bitfields()
515 return -ENOMEM; in lpass_hdmi_init_bitfields()
517 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->replace_vbit, vbit_ctl->replace_vbit); in lpass_hdmi_init_bitfields()
518 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->vbit_stream, vbit_ctl->vbit_stream); in lpass_hdmi_init_bitfields()
519 drvdata->vbit_ctl = vbit_ctl; in lpass_hdmi_init_bitfields()
522 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->calc_en, tx_parity); in lpass_hdmi_init_bitfields()
523 drvdata->hdmitx_parity_calc_en = tx_parity; in lpass_hdmi_init_bitfields()
527 return -ENOMEM; in lpass_hdmi_init_bitfields()
529 rval = devm_regmap_field_bulk_alloc(dev, map, &meta_ctl->mute, &v->mute, 7); in lpass_hdmi_init_bitfields()
532 drvdata->meta_ctl = meta_ctl; in lpass_hdmi_init_bitfields()
536 return -ENOMEM; in lpass_hdmi_init_bitfields()
538 rval = devm_regmap_field_bulk_alloc(dev, map, &sstream_ctl->sstream_en, &v->sstream_en, 9); in lpass_hdmi_init_bitfields()
542 drvdata->sstream_ctl = sstream_ctl; in lpass_hdmi_init_bitfields()
545 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->msb_bits, ch_msb); in lpass_hdmi_init_bitfields()
546 drvdata->hdmitx_ch_msb[i] = ch_msb; in lpass_hdmi_init_bitfields()
548 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->lsb_bits, ch_lsb); in lpass_hdmi_init_bitfields()
549 drvdata->hdmitx_ch_lsb[i] = ch_lsb; in lpass_hdmi_init_bitfields()
553 return -ENOMEM; in lpass_hdmi_init_bitfields()
555 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->use_hw_chs, tx_dmactl->use_hw_chs); in lpass_hdmi_init_bitfields()
556 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->use_hw_usr, tx_dmactl->use_hw_usr); in lpass_hdmi_init_bitfields()
557 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->hw_chs_sel, tx_dmactl->hw_chs_sel); in lpass_hdmi_init_bitfields()
558 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->hw_usr_sel, tx_dmactl->hw_usr_sel); in lpass_hdmi_init_bitfields()
559 drvdata->hdmi_tx_dmactl[i] = tx_dmactl; in lpass_hdmi_init_bitfields()
567 struct lpass_variant *v = drvdata->variant; in lpass_hdmi_regmap_writeable()
587 for (i = 0; i < v->hdmi_rdma_channels; i++) { in lpass_hdmi_regmap_writeable()
596 for (i = 0; i < v->rdma_channels; ++i) { in lpass_hdmi_regmap_writeable()
612 struct lpass_variant *v = drvdata->variant; in lpass_hdmi_regmap_readable()
622 for (i = 0; i < v->hdmi_rdma_channels; i++) { in lpass_hdmi_regmap_readable()
642 for (i = 0; i < v->rdma_channels; ++i) { in lpass_hdmi_regmap_readable()
661 struct lpass_variant *v = drvdata->variant; in lpass_hdmi_regmap_volatile()
669 for (i = 0; i < v->rdma_channels; ++i) { in lpass_hdmi_regmap_volatile()
690 unsigned int lines[LPASS_CPU_MAX_MI2S_LINES]; in of_lpass_cpu_parse_sd_lines() local
694 num_lines = of_property_read_variable_u32_array(node, name, lines, 0, in of_lpass_cpu_parse_sd_lines()
700 sd_line_mask |= BIT(lines[i]); in of_lpass_cpu_parse_sd_lines()
720 dev_err(dev, "Unsupported SD line mask: %#x\n", sd_line_mask); in of_lpass_cpu_parse_sd_lines()
732 for (id = 0; id < data->variant->num_dai; id++) { in of_lpass_cpu_parse_dai_data()
733 data->mi2s_playback_sd_mode[id] = LPAIF_I2SCTL_MODE_8CH; in of_lpass_cpu_parse_dai_data()
734 data->mi2s_capture_sd_mode[id] = LPAIF_I2SCTL_MODE_8CH; in of_lpass_cpu_parse_dai_data()
737 for_each_child_of_node(dev->of_node, node) { in of_lpass_cpu_parse_dai_data()
739 if (ret || id < 0 || id >= data->variant->num_dai) { in of_lpass_cpu_parse_dai_data()
744 data->hdmi_port_enable = 1; in of_lpass_cpu_parse_dai_data()
747 data->mi2s_playback_sd_mode[id] = in of_lpass_cpu_parse_dai_data()
749 "qcom,playback-sd-lines"); in of_lpass_cpu_parse_dai_data()
750 data->mi2s_capture_sd_mode[id] = in of_lpass_cpu_parse_dai_data()
752 "qcom,capture-sd-lines"); in of_lpass_cpu_parse_dai_data()
763 struct device *dev = &pdev->dev; in asoc_qcom_lpass_cpu_platform_probe()
767 dsp_of_node = of_parse_phandle(pdev->dev.of_node, "qcom,adsp", 0); in asoc_qcom_lpass_cpu_platform_probe()
770 return -EBUSY; in asoc_qcom_lpass_cpu_platform_probe()
775 return -ENOMEM; in asoc_qcom_lpass_cpu_platform_probe()
778 match = of_match_device(dev->driver->of_match_table, dev); in asoc_qcom_lpass_cpu_platform_probe()
779 if (!match || !match->data) in asoc_qcom_lpass_cpu_platform_probe()
780 return -EINVAL; in asoc_qcom_lpass_cpu_platform_probe()
782 drvdata->variant = (struct lpass_variant *)match->data; in asoc_qcom_lpass_cpu_platform_probe()
783 variant = drvdata->variant; in asoc_qcom_lpass_cpu_platform_probe()
787 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "lpass-lpaif"); in asoc_qcom_lpass_cpu_platform_probe()
789 drvdata->lpaif = devm_ioremap_resource(dev, res); in asoc_qcom_lpass_cpu_platform_probe()
790 if (IS_ERR((void const __force *)drvdata->lpaif)) { in asoc_qcom_lpass_cpu_platform_probe()
792 PTR_ERR((void const __force *)drvdata->lpaif)); in asoc_qcom_lpass_cpu_platform_probe()
793 return PTR_ERR((void const __force *)drvdata->lpaif); in asoc_qcom_lpass_cpu_platform_probe()
797 variant->wrdma_channels + in asoc_qcom_lpass_cpu_platform_probe()
798 variant->wrdma_channel_start); in asoc_qcom_lpass_cpu_platform_probe()
800 drvdata->lpaif_map = devm_regmap_init_mmio(dev, drvdata->lpaif, in asoc_qcom_lpass_cpu_platform_probe()
802 if (IS_ERR(drvdata->lpaif_map)) { in asoc_qcom_lpass_cpu_platform_probe()
804 PTR_ERR(drvdata->lpaif_map)); in asoc_qcom_lpass_cpu_platform_probe()
805 return PTR_ERR(drvdata->lpaif_map); in asoc_qcom_lpass_cpu_platform_probe()
808 if (drvdata->hdmi_port_enable) { in asoc_qcom_lpass_cpu_platform_probe()
809 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "lpass-hdmiif"); in asoc_qcom_lpass_cpu_platform_probe()
811 drvdata->hdmiif = devm_ioremap_resource(dev, res); in asoc_qcom_lpass_cpu_platform_probe()
812 if (IS_ERR((void const __force *)drvdata->hdmiif)) { in asoc_qcom_lpass_cpu_platform_probe()
814 PTR_ERR((void const __force *)drvdata->hdmiif)); in asoc_qcom_lpass_cpu_platform_probe()
815 return PTR_ERR((void const __force *)drvdata->hdmiif); in asoc_qcom_lpass_cpu_platform_probe()
819 variant->hdmi_rdma_channels); in asoc_qcom_lpass_cpu_platform_probe()
820 drvdata->hdmiif_map = devm_regmap_init_mmio(dev, drvdata->hdmiif, in asoc_qcom_lpass_cpu_platform_probe()
822 if (IS_ERR(drvdata->hdmiif_map)) { in asoc_qcom_lpass_cpu_platform_probe()
824 PTR_ERR(drvdata->hdmiif_map)); in asoc_qcom_lpass_cpu_platform_probe()
825 return PTR_ERR(drvdata->hdmiif_map); in asoc_qcom_lpass_cpu_platform_probe()
829 if (variant->init) { in asoc_qcom_lpass_cpu_platform_probe()
830 ret = variant->init(pdev); in asoc_qcom_lpass_cpu_platform_probe()
837 for (i = 0; i < variant->num_dai; i++) { in asoc_qcom_lpass_cpu_platform_probe()
838 dai_id = variant->dai_driver[i].id; in asoc_qcom_lpass_cpu_platform_probe()
842 drvdata->mi2s_osr_clk[dai_id] = devm_clk_get(dev, in asoc_qcom_lpass_cpu_platform_probe()
843 variant->dai_osr_clk_names[i]); in asoc_qcom_lpass_cpu_platform_probe()
844 if (IS_ERR(drvdata->mi2s_osr_clk[dai_id])) { in asoc_qcom_lpass_cpu_platform_probe()
848 variant->dai_osr_clk_names[i], in asoc_qcom_lpass_cpu_platform_probe()
849 PTR_ERR(drvdata->mi2s_osr_clk[dai_id])); in asoc_qcom_lpass_cpu_platform_probe()
851 drvdata->mi2s_osr_clk[dai_id] = NULL; in asoc_qcom_lpass_cpu_platform_probe()
854 drvdata->mi2s_bit_clk[dai_id] = devm_clk_get(dev, in asoc_qcom_lpass_cpu_platform_probe()
855 variant->dai_bit_clk_names[i]); in asoc_qcom_lpass_cpu_platform_probe()
856 if (IS_ERR(drvdata->mi2s_bit_clk[dai_id])) { in asoc_qcom_lpass_cpu_platform_probe()
859 variant->dai_bit_clk_names[i], in asoc_qcom_lpass_cpu_platform_probe()
860 PTR_ERR(drvdata->mi2s_bit_clk[dai_id])); in asoc_qcom_lpass_cpu_platform_probe()
861 return PTR_ERR(drvdata->mi2s_bit_clk[dai_id]); in asoc_qcom_lpass_cpu_platform_probe()
863 drvdata->bit_clk_state[dai_id] = LPAIF_BIT_CLK_DISABLE; in asoc_qcom_lpass_cpu_platform_probe()
867 drvdata->i2sctl = devm_kzalloc(&pdev->dev, sizeof(struct lpaif_i2sctl), in asoc_qcom_lpass_cpu_platform_probe()
871 ret = lpass_cpu_init_i2sctl_bitfields(dev, drvdata->i2sctl, in asoc_qcom_lpass_cpu_platform_probe()
872 drvdata->lpaif_map); in asoc_qcom_lpass_cpu_platform_probe()
878 if (drvdata->hdmi_port_enable) { in asoc_qcom_lpass_cpu_platform_probe()
879 ret = lpass_hdmi_init_bitfields(dev, drvdata->hdmiif_map); in asoc_qcom_lpass_cpu_platform_probe()
887 variant->dai_driver, in asoc_qcom_lpass_cpu_platform_probe()
888 variant->num_dai); in asoc_qcom_lpass_cpu_platform_probe()
909 if (drvdata->variant->exit) in asoc_qcom_lpass_cpu_platform_remove()
910 drvdata->variant->exit(pdev); in asoc_qcom_lpass_cpu_platform_remove()