Lines Matching full:i2s
3 * linux/sound/soc/m8m/hi6210_i2s.c - I2S IP driver
32 #include "hi6210-i2s.h"
81 static inline void hi6210_write_reg(struct hi6210_i2s *i2s, int reg, u32 val) in hi6210_write_reg() argument
83 writel(val, i2s->base + reg); in hi6210_write_reg()
86 static inline u32 hi6210_read_reg(struct hi6210_i2s *i2s, int reg) in hi6210_read_reg() argument
88 return readl(i2s->base + reg); in hi6210_read_reg()
94 struct hi6210_i2s *i2s = dev_get_drvdata(cpu_dai->dev); in hi6210_i2s_startup() local
99 regmap_read(i2s->sysctrl, SC_PERIPH_RSTSTAT2, &val); in hi6210_i2s_startup()
101 regmap_write(i2s->sysctrl, SC_PERIPH_RSTDIS2, BIT(4)); in hi6210_i2s_startup()
103 for (n = 0; n < i2s->clocks; n++) { in hi6210_i2s_startup()
104 ret = clk_prepare_enable(i2s->clk[n]); in hi6210_i2s_startup()
107 clk_disable_unprepare(i2s->clk[n]); in hi6210_i2s_startup()
112 ret = clk_set_rate(i2s->clk[CLK_I2S_BASE], 49152000); in hi6210_i2s_startup()
114 dev_err(i2s->dev, "%s: setting 49.152MHz base rate failed %d\n", in hi6210_i2s_startup()
120 regmap_write(i2s->sysctrl, SC_PERIPH_CLKEN12, BIT(9)); in hi6210_i2s_startup()
123 regmap_write(i2s->sysctrl, SC_PERIPH_CLKEN1, BIT(5)); in hi6210_i2s_startup()
126 regmap_write(i2s->sysctrl, SC_PERIPH_RSTEN1, BIT(5)); in hi6210_i2s_startup()
127 regmap_write(i2s->sysctrl, SC_PERIPH_RSTDIS1, BIT(5)); in hi6210_i2s_startup()
129 /* not interested in i2s irqs */ in hi6210_i2s_startup()
130 val = hi6210_read_reg(i2s, HII2S_CODEC_IRQ_MASK); in hi6210_i2s_startup()
132 hi6210_write_reg(i2s, HII2S_CODEC_IRQ_MASK, val); in hi6210_i2s_startup()
136 val = hi6210_read_reg(i2s, HII2S_APB_AFIFO_CFG_1); in hi6210_i2s_startup()
138 hi6210_write_reg(i2s, HII2S_APB_AFIFO_CFG_1, val); in hi6210_i2s_startup()
140 val = hi6210_read_reg(i2s, HII2S_APB_AFIFO_CFG_1); in hi6210_i2s_startup()
142 hi6210_write_reg(i2s, HII2S_APB_AFIFO_CFG_1, val); in hi6210_i2s_startup()
145 val = hi6210_read_reg(i2s, HII2S_SW_RST_N); in hi6210_i2s_startup()
149 hi6210_write_reg(i2s, HII2S_SW_RST_N, val); in hi6210_i2s_startup()
151 val = hi6210_read_reg(i2s, HII2S_MISC_CFG); in hi6210_i2s_startup()
152 /* mux 11/12 = APB not i2s */ in hi6210_i2s_startup()
161 hi6210_write_reg(i2s, HII2S_MISC_CFG, val); in hi6210_i2s_startup()
163 val = hi6210_read_reg(i2s, HII2S_SW_RST_N); in hi6210_i2s_startup()
165 hi6210_write_reg(i2s, HII2S_SW_RST_N, val); in hi6210_i2s_startup()
173 struct hi6210_i2s *i2s = dev_get_drvdata(cpu_dai->dev); in hi6210_i2s_shutdown() local
176 for (n = 0; n < i2s->clocks; n++) in hi6210_i2s_shutdown()
177 clk_disable_unprepare(i2s->clk[n]); in hi6210_i2s_shutdown()
179 regmap_write(i2s->sysctrl, SC_PERIPH_RSTEN1, BIT(5)); in hi6210_i2s_shutdown()
184 struct hi6210_i2s *i2s = dev_get_drvdata(cpu_dai->dev); in hi6210_i2s_txctrl() local
187 spin_lock(&i2s->lock); in hi6210_i2s_txctrl()
190 val = hi6210_read_reg(i2s, HII2S_I2S_CFG); in hi6210_i2s_txctrl()
192 hi6210_write_reg(i2s, HII2S_I2S_CFG, val); in hi6210_i2s_txctrl()
195 val = hi6210_read_reg(i2s, HII2S_I2S_CFG); in hi6210_i2s_txctrl()
197 hi6210_write_reg(i2s, HII2S_I2S_CFG, val); in hi6210_i2s_txctrl()
199 spin_unlock(&i2s->lock); in hi6210_i2s_txctrl()
204 struct hi6210_i2s *i2s = dev_get_drvdata(cpu_dai->dev); in hi6210_i2s_rxctrl() local
207 spin_lock(&i2s->lock); in hi6210_i2s_rxctrl()
209 val = hi6210_read_reg(i2s, HII2S_I2S_CFG); in hi6210_i2s_rxctrl()
211 hi6210_write_reg(i2s, HII2S_I2S_CFG, val); in hi6210_i2s_rxctrl()
213 val = hi6210_read_reg(i2s, HII2S_I2S_CFG); in hi6210_i2s_rxctrl()
215 hi6210_write_reg(i2s, HII2S_I2S_CFG, val); in hi6210_i2s_rxctrl()
217 spin_unlock(&i2s->lock); in hi6210_i2s_rxctrl()
222 struct hi6210_i2s *i2s = dev_get_drvdata(cpu_dai->dev); in hi6210_i2s_set_fmt() local
245 i2s->format = fmt; in hi6210_i2s_set_fmt()
246 i2s->master = (i2s->format & SND_SOC_DAIFMT_MASTER_MASK) == in hi6210_i2s_set_fmt()
256 struct hi6210_i2s *i2s = dev_get_drvdata(cpu_dai->dev); in hi6210_i2s_hw_params() local
313 i2s->bits = 32; in hi6210_i2s_hw_params()
317 i2s->bits = 16; in hi6210_i2s_hw_params()
321 i2s->rate = params_rate(params); in hi6210_i2s_hw_params()
322 i2s->channels = params_channels(params); in hi6210_i2s_hw_params()
323 i2s->channel_length = i2s->channels * i2s->bits; in hi6210_i2s_hw_params()
325 val = hi6210_read_reg(i2s, HII2S_ST_DL_FIFO_TH_CFG); in hi6210_i2s_hw_params()
338 hi6210_write_reg(i2s, HII2S_ST_DL_FIFO_TH_CFG, val); in hi6210_i2s_hw_params()
341 val = hi6210_read_reg(i2s, HII2S_IF_CLK_EN_CFG); in hi6210_i2s_hw_params()
348 hi6210_write_reg(i2s, HII2S_IF_CLK_EN_CFG, val); in hi6210_i2s_hw_params()
351 val = hi6210_read_reg(i2s, HII2S_DIG_FILTER_CLK_EN_CFG); in hi6210_i2s_hw_params()
360 hi6210_write_reg(i2s, HII2S_DIG_FILTER_CLK_EN_CFG, val); in hi6210_i2s_hw_params()
363 val = hi6210_read_reg(i2s, HII2S_DIG_FILTER_MODULE_CFG); in hi6210_i2s_hw_params()
366 hi6210_write_reg(i2s, HII2S_DIG_FILTER_MODULE_CFG, val); in hi6210_i2s_hw_params()
368 val = hi6210_read_reg(i2s, HII2S_MUX_TOP_MODULE_CFG); in hi6210_i2s_hw_params()
373 hi6210_write_reg(i2s, HII2S_MUX_TOP_MODULE_CFG, val); in hi6210_i2s_hw_params()
376 switch (i2s->format & SND_SOC_DAIFMT_MASTER_MASK) { in hi6210_i2s_hw_params()
378 i2s->master = false; in hi6210_i2s_hw_params()
379 val = hi6210_read_reg(i2s, HII2S_I2S_CFG); in hi6210_i2s_hw_params()
381 hi6210_write_reg(i2s, HII2S_I2S_CFG, val); in hi6210_i2s_hw_params()
384 i2s->master = true; in hi6210_i2s_hw_params()
385 val = hi6210_read_reg(i2s, HII2S_I2S_CFG); in hi6210_i2s_hw_params()
387 hi6210_write_reg(i2s, HII2S_I2S_CFG, val); in hi6210_i2s_hw_params()
390 WARN_ONCE(1, "Invalid i2s->fmt MASTER_MASK. This shouldn't happen\n"); in hi6210_i2s_hw_params()
394 switch (i2s->format & SND_SOC_DAIFMT_FORMAT_MASK) { in hi6210_i2s_hw_params()
405 WARN_ONCE(1, "Invalid i2s->fmt FORMAT_MASK. This shouldn't happen\n"); in hi6210_i2s_hw_params()
409 val = hi6210_read_reg(i2s, HII2S_I2S_CFG); in hi6210_i2s_hw_params()
413 hi6210_write_reg(i2s, HII2S_I2S_CFG, val); in hi6210_i2s_hw_params()
416 val = hi6210_read_reg(i2s, HII2S_CLK_SEL); in hi6210_i2s_hw_params()
417 val &= ~(HII2S_CLK_SEL__I2S_BT_FM_SEL | /* BT gets the I2S */ in hi6210_i2s_hw_params()
419 hi6210_write_reg(i2s, HII2S_CLK_SEL, val); in hi6210_i2s_hw_params()
424 dma_data->addr = i2s->base_phys + HII2S_ST_DL_CHANNEL; in hi6210_i2s_hw_params()
426 dma_data->addr = i2s->base_phys + HII2S_STEREO_UPLINK_CHANNEL; in hi6210_i2s_hw_params()
428 switch (i2s->channels) { in hi6210_i2s_hw_params()
430 val = hi6210_read_reg(i2s, HII2S_I2S_CFG); in hi6210_i2s_hw_params()
432 hi6210_write_reg(i2s, HII2S_I2S_CFG, val); in hi6210_i2s_hw_params()
435 val = hi6210_read_reg(i2s, HII2S_I2S_CFG); in hi6210_i2s_hw_params()
437 hi6210_write_reg(i2s, HII2S_I2S_CFG, val); in hi6210_i2s_hw_params()
442 val = hi6210_read_reg(i2s, HII2S_I2S_CFG); in hi6210_i2s_hw_params()
450 hi6210_write_reg(i2s, HII2S_I2S_CFG, val); in hi6210_i2s_hw_params()
453 if (!i2s->master) in hi6210_i2s_hw_params()
457 val = hi6210_read_reg(i2s, HII2S_FS_CFG); in hi6210_i2s_hw_params()
468 hi6210_write_reg(i2s, HII2S_FS_CFG, val); in hi6210_i2s_hw_params()
501 struct hi6210_i2s *i2s = snd_soc_dai_get_drvdata(dai); in hi6210_i2s_dai_probe() local
504 &i2s->dma_data[SNDRV_PCM_STREAM_PLAYBACK], in hi6210_i2s_dai_probe()
505 &i2s->dma_data[SNDRV_PCM_STREAM_CAPTURE]); in hi6210_i2s_dai_probe()
539 .name = "hi6210_i2s-i2s",
546 struct hi6210_i2s *i2s; in hi6210_i2s_probe() local
550 i2s = devm_kzalloc(dev, sizeof(*i2s), GFP_KERNEL); in hi6210_i2s_probe()
551 if (!i2s) in hi6210_i2s_probe()
554 i2s->dev = dev; in hi6210_i2s_probe()
555 spin_lock_init(&i2s->lock); in hi6210_i2s_probe()
558 i2s->base = devm_ioremap_resource(dev, res); in hi6210_i2s_probe()
559 if (IS_ERR(i2s->base)) in hi6210_i2s_probe()
560 return PTR_ERR(i2s->base); in hi6210_i2s_probe()
562 i2s->base_phys = (phys_addr_t)res->start; in hi6210_i2s_probe()
563 i2s->dai = hi6210_i2s_dai_init; in hi6210_i2s_probe()
565 dev_set_drvdata(dev, i2s); in hi6210_i2s_probe()
567 i2s->sysctrl = syscon_regmap_lookup_by_phandle(node, in hi6210_i2s_probe()
569 if (IS_ERR(i2s->sysctrl)) in hi6210_i2s_probe()
570 return PTR_ERR(i2s->sysctrl); in hi6210_i2s_probe()
572 i2s->clk[CLK_DACODEC] = devm_clk_get(dev, "dacodec"); in hi6210_i2s_probe()
573 if (IS_ERR(i2s->clk[CLK_DACODEC])) in hi6210_i2s_probe()
574 return PTR_ERR(i2s->clk[CLK_DACODEC]); in hi6210_i2s_probe()
575 i2s->clocks++; in hi6210_i2s_probe()
577 i2s->clk[CLK_I2S_BASE] = devm_clk_get(dev, "i2s-base"); in hi6210_i2s_probe()
578 if (IS_ERR(i2s->clk[CLK_I2S_BASE])) in hi6210_i2s_probe()
579 return PTR_ERR(i2s->clk[CLK_I2S_BASE]); in hi6210_i2s_probe()
580 i2s->clocks++; in hi6210_i2s_probe()
587 &i2s->dai, 1); in hi6210_i2s_probe()
592 { .compatible = "hisilicon,hi6210-i2s" },
608 MODULE_DESCRIPTION("Hisilicon HI6210 I2S driver");