soc/fsl/fsl_sai.h

1 /* SPDX-License-Identifier: GPL-2.0 */
3  * Copyright 2012-2013 Freescale Semiconductor, Inc.
44 #define FSL_SAI_TBCTN	0x78 /* SAI Transmit Bit Counter Register */
71 #define FSL_SAI_RBCTN	0xf8 /* SAI Receive Bit Counter Register */
88 #define FSL_SAI_CSR_TERE	BIT(31)
89 #define FSL_SAI_CSR_SE		BIT(30)
90 #define FSL_SAI_CSR_FR		BIT(25)
91 #define FSL_SAI_CSR_SR		BIT(24)
96 #define FSL_SAI_CSR_WSF		BIT(20)
97 #define FSL_SAI_CSR_SEF		BIT(19)
98 #define FSL_SAI_CSR_FEF		BIT(18)
99 #define FSL_SAI_CSR_FWF		BIT(17)
100 #define FSL_SAI_CSR_FRF		BIT(16)
103 #define FSL_SAI_CSR_WSIE	BIT(12)
104 #define FSL_SAI_CSR_SEIE	BIT(11)
105 #define FSL_SAI_CSR_FEIE	BIT(10)
106 #define FSL_SAI_CSR_FWIE	BIT(9)
107 #define FSL_SAI_CSR_FRIE	BIT(8)
108 #define FSL_SAI_CSR_FRDE	BIT(0)
111 #define FSL_SAI_CR1_RFW_MASK(x)	((x) - 1)
114 #define FSL_SAI_CR2_SYNC	BIT(30)
117 #define FSL_SAI_CR2_MSEL_MCLK1	BIT(26)
118 #define FSL_SAI_CR2_MSEL_MCLK2	BIT(27)
119 #define FSL_SAI_CR2_MSEL_MCLK3	(BIT(26) | BIT(27))
121 #define FSL_SAI_CR2_BCP		BIT(25)
122 #define FSL_SAI_CR2_BCD_MSTR	BIT(24)
123 #define FSL_SAI_CR2_BYP		BIT(23) /* BCLK bypass */
134 #define FSL_SAI_CR4_FCONT	BIT(28)
135 #define FSL_SAI_CR4_FCOMB_SHIFT BIT(26)
136 #define FSL_SAI_CR4_FCOMB_SOFT  BIT(27)
138 #define FSL_SAI_CR4_FPACK_8     (0x2 << 24)
139 #define FSL_SAI_CR4_FPACK_16    (0x3 << 24)
140 #define FSL_SAI_CR4_FRSZ(x)	(((x) - 1) << 16)
142 #define FSL_SAI_CR4_SYWD(x)	(((x) - 1) << 8)
144 #define FSL_SAI_CR4_CHMOD       BIT(5)
145 #define FSL_SAI_CR4_CHMOD_MASK  BIT(5)
146 #define FSL_SAI_CR4_MF		BIT(4)
147 #define FSL_SAI_CR4_FSE		BIT(3)
148 #define FSL_SAI_CR4_FSP		BIT(1)
149 #define FSL_SAI_CR4_FSD_MSTR	BIT(0)
152 #define FSL_SAI_CR5_WNW(x)	(((x) - 1) << 24)
153 #define FSL_SAI_CR5_WNW_MASK	(0x1f << 24)
154 #define FSL_SAI_CR5_W0W(x)	(((x) - 1) << 16)
160 #define FSL_SAI_MCTL_MCLK_EN	BIT(30)	/* MCLK Enable */
161 #define FSL_SAI_MCTL_MSEL_MASK	(0x3 << 24)
162 #define FSL_SAI_MCTL_MSEL(ID)   ((ID) << 24)
164 #define FSL_SAI_MCTL_MSEL_MCLK1	BIT(24)
165 #define FSL_SAI_MCTL_MSEL_MCLK2	BIT(25)
166 #define FSL_SAI_MCTL_MSEL_MCLK3	(BIT(24) | BIT(25))
167 #define FSL_SAI_MCTL_DIV_EN	BIT(23)
171 #define FSL_SAI_VERID_MAJOR_SHIFT   24
172 #define FSL_SAI_VERID_MAJOR_MASK    GENMASK(31, 24)
177 #define FSL_SAI_VERID_EFIFO_EN	    BIT(0)
178 #define FSL_SAI_VERID_TSTMP_EN	    BIT(1)
191 #define FSL_SAI_xTCTL_TSEN         BIT(0)
192 #define FSL_SAI_xTCTL_TSINC        BIT(1)
193 #define FSL_SAI_xTCTL_RTSC         BIT(8)
194 #define FSL_SAI_xTCTL_RBC          BIT(9)
197 #define FSL_SAI_DMA		BIT(0)
198 #define FSL_SAI_USE_AC97	BIT(1)
199 #define FSL_SAI_NET		BIT(2)
200 #define FSL_SAI_TRA_SYN		BIT(3)
201 #define FSL_SAI_REC_SYN		BIT(4)
202 #define FSL_SAI_USE_I2S_SLAVE	BIT(5)
227  * struct fsl_sai_verid - version id data
231  *           0000000000000000b - Standard feature set
232  *           0000000000000000b - Standard feature set
241  * struct fsl_sai_param - parameter data