Lines Matching full:13
291 #define RT5670_M_DAC_L2_VOL (0x1 << 13)
292 #define RT5670_M_DAC_L2_VOL_SFT 13
333 #define RT5670_M_ADC_L2 (0x1 << 13)
334 #define RT5670_M_ADC_L2_SFT 13
355 #define RT5670_M_MONO_ADC_L2 (0x1 << 13)
356 #define RT5670_M_MONO_ADC_L2_SFT 13
405 #define RT5670_DAC_L1_STO_L_VOL_MASK (0x1 << 13)
406 #define RT5670_DAC_L1_STO_L_VOL_SFT 13
431 #define RT5670_DAC_L1_MONO_L_VOL_MASK (0x1 << 13)
432 #define RT5670_DAC_L1_MONO_L_VOL_SFT 13
459 #define RT5670_M_DAC_L2_DAC_L (0x1 << 13)
460 #define RT5670_M_DAC_L2_DAC_L_SFT 13
481 #define RT5670_RXDP_SEL_MASK (0x7 << 13)
482 #define RT5670_RXDP_SEL_SFT 13
525 #define RT5670_PDM1_R_MASK (0x1 << 13)
526 #define RT5670_PDM1_R_SFT 13
544 #define RT5670_G_HP_L_RM_L_MASK (0x7 << 13)
545 #define RT5670_G_HP_L_RM_L_SFT 13
556 #define RT5670_G_BST1_RM_L_MASK (0x7 << 13)
557 #define RT5670_G_BST1_RM_L_SFT 13
566 #define RT5670_G_HP_R_RM_R_MASK (0x7 << 13)
567 #define RT5670_G_HP_R_RM_R_SFT 13
578 #define RT5670_G_BST1_RM_R_MASK (0x7 << 13)
579 #define RT5670_G_BST1_RM_R_SFT 13
592 #define RT5670_M_DAC1_HM (0x1 << 13)
593 #define RT5670_M_DAC1_HM_SFT 13
610 #define RT5670_M_OV_R_MM (0x1 << 13)
611 #define RT5670_M_OV_R_MM_SFT 13
624 #define RT5670_G_BST3_OM_L_MASK (0x7 << 13)
625 #define RT5670_G_BST3_OM_L_SFT 13
636 #define RT5670_G_DAC_R2_OM_L_MASK (0x7 << 13)
637 #define RT5670_G_DAC_R2_OM_L_SFT 13
654 #define RT5670_G_BST4_OM_R_MASK (0x7 << 13)
655 #define RT5670_G_BST4_OM_R_SFT 13
666 #define RT5670_G_DAC_L2_OM_R_MASK (0x7 << 13)
667 #define RT5670_G_DAC_L2_OM_R_SFT 13
688 #define RT5670_M_OV_L_LM (0x1 << 13)
689 #define RT5670_M_OV_L_LM_SFT 13
720 #define RT5670_PWR_ADC_MF_R (0x1 << 13)
721 #define RT5670_PWR_ADC_MF_R_BIT 13
742 #define RT5670_PWR_MB (0x1 << 13)
743 #define RT5670_PWR_MB_BIT 13
764 #define RT5670_PWR_BST2 (0x1 << 13)
765 #define RT5670_PWR_BST2_BIT 13
926 #define RT5670_DMIC_1L_LH_MASK (0x1 << 13)
927 #define RT5670_DMIC_1L_LH_SFT 13
928 #define RT5670_DMIC_1L_LH_FALLING (0x0 << 13)
929 #define RT5670_DMIC_1L_LH_RISING (0x1 << 13)
1138 #define RT5670_DEPOP_MASK (0x1 << 13)
1139 #define RT5670_DEPOP_SFT 13
1140 #define RT5670_DEPOP_AUTO (0x0 << 13)
1141 #define RT5670_DEPOP_MAN (0x1 << 13)
1229 #define RT5670_MIC1_CLK_MASK (0x1 << 13)
1230 #define RT5670_MIC1_CLK_SFT 13
1231 #define RT5670_MIC1_CLK_DIS (0x0 << 13)
1232 #define RT5670_MIC1_CLK_EN (0x1 << 13)
1281 #define RT5670_EQ_CD_MASK (0x1 << 13)
1282 #define RT5670_EQ_CD_SFT 13
1283 #define RT5670_EQ_CD_DIS (0x0 << 13)
1284 #define RT5670_EQ_CD_EN (0x1 << 13)
1346 #define RT5670_DRC_AGC_UPD (0x1 << 13)
1347 #define RT5670_DRC_AGC_UPD_BIT 13
1394 #define RT5670_JD_MASK (0x7 << 13)
1395 #define RT5670_JD_SFT 13
1396 #define RT5670_JD_DIS (0x0 << 13)
1397 #define RT5670_JD_GPIO1 (0x1 << 13)
1398 #define RT5670_JD_JD1_IN4P (0x2 << 13)
1399 #define RT5670_JD_JD2_IN4N (0x3 << 13)
1400 #define RT5670_JD_GPIO2 (0x4 << 13)
1401 #define RT5670_JD_GPIO3 (0x5 << 13)
1402 #define RT5670_JD_GPIO4 (0x6 << 13)
1461 #define RT5670_JD_STKY_MASK (0x1 << 13)
1462 #define RT5670_JD_STKY_SFT 13
1463 #define RT5670_JD_STKY_DIS (0x0 << 13)
1464 #define RT5670_JD_STKY_EN (0x1 << 13)
1660 #define RT5670_M_MP3_MASK (0x1 << 13)
1661 #define RT5670_M_MP3_SFT 13
1662 #define RT5670_M_MP3_DIS (0x0 << 13)
1663 #define RT5670_M_MP3_EN (0x1 << 13)
1676 #define RT5670_MP3_WT_MASK (0x1 << 13)
1677 #define RT5670_MP3_WT_SFT 13
1678 #define RT5670_MP3_WT_1_4 (0x0 << 13)
1679 #define RT5670_MP3_WT_1_2 (0x1 << 13)
1694 #define RT5670_3D_BT_MASK (0x1 << 13)
1695 #define RT5670_3D_BT_SFT 13
1696 #define RT5670_3D_BT_DIS (0x0 << 13)
1697 #define RT5670_3D_BT_EN (0x1 << 13)
1781 #define RT5670_OUT_SV_MASK (0x1 << 13)
1782 #define RT5670_OUT_SV_SFT 13
1783 #define RT5670_OUT_SV_DIS (0x0 << 13)
1784 #define RT5670_OUT_SV_EN (0x1 << 13)
1825 #define RT5670_3D_SPK_M_MASK (0x3 << 13)
1826 #define RT5670_3D_SPK_M_SFT 13
1859 #define RT5670_WND_WIND_MASK (0x1 << 13) /* Read-Only */
1860 #define RT5670_WND_WIND_SFT 13
1909 #define RT5670_RST_DSP (0x1 << 13)