Lines Matching +full:10 +full:- +full:11
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5670.h -- RT5670 ALSA SoC audio driver
17 /* I/O - Output */
20 /* I/O - Input */
26 /* I/O - ADC/DAC/DMIC */
34 /* Mixer - D-D */
47 /* Mixer - PDM */
56 /* Mixer - ADC */
61 /* Mixer - DAC */
77 /* Format - ADC/DAC */
86 /* Format - TDM Control */
91 /* Function - Analog */
121 /* Function - Digital */
241 #define RT5670_CAPLESS_EN (0x1 << 11)
317 #define RT5670_STO1_ADC_COMP_MASK (0x3 << 10)
318 #define RT5670_STO1_ADC_COMP_SFT 10
339 #define RT5670_ADC_2_SRC_MASK (0x1 << 11)
340 #define RT5670_ADC_2_SRC_SFT 11
341 #define RT5670_ADC_SRC_MASK (0x1 << 10)
342 #define RT5670_ADC_SRC_SFT 10
361 #define RT5670_MONO_ADC_L2_SRC_MASK (0x1 << 11)
362 #define RT5670_MONO_ADC_L2_SRC_SFT 11
363 #define RT5670_MONO_ADC_L_SRC_MASK (0x1 << 10)
364 #define RT5670_MONO_ADC_L_SRC_SFT 10
385 #define RT5670_DAC1_R_SEL_MASK (0x3 << 10)
386 #define RT5670_DAC1_R_SEL_SFT 10
387 #define RT5670_DAC1_R_SEL_IF1 (0x0 << 10)
388 #define RT5670_DAC1_R_SEL_IF2 (0x1 << 10)
389 #define RT5670_DAC1_R_SEL_IF3 (0x2 << 10)
390 #define RT5670_DAC1_R_SEL_IF4 (0x3 << 10)
409 #define RT5670_DAC_L2_STO_L_VOL_MASK (0x1 << 11)
410 #define RT5670_DAC_L2_STO_L_VOL_SFT 11
435 #define RT5670_DAC_L2_MONO_L_VOL_MASK (0x1 << 11)
436 #define RT5670_DAC_L2_MONO_L_VOL_SFT 11
437 #define RT5670_M_DAC_R2_MONO_L (0x1 << 10)
438 #define RT5670_M_DAC_R2_MONO_L_SFT 10
463 #define RT5670_M_STO_R_DAC_R (0x1 << 11)
464 #define RT5670_M_STO_R_DAC_R_SFT 11
465 #define RT5670_STO_R_DAC_R_VOL_MASK (0x1 << 10)
466 #define RT5670_STO_R_DAC_R_VOL_SFT 10
483 #define RT5670_RXDP_SRC_MASK (0x3 << 11)
484 #define RT5670_RXDP_SRC_SFT 11
485 #define RT5670_RXDP_SRC_NOR (0x0 << 11)
486 #define RT5670_RXDP_SRC_DIV2 (0x1 << 11)
487 #define RT5670_RXDP_SRC_DIV3 (0x2 << 11)
511 #define RT5670_IF2_DAC_SEL_MASK (0x3 << 10)
512 #define RT5670_IF2_DAC_SEL_SFT 10
529 #define RT5670_PDM2_L_MASK (0x1 << 11)
530 #define RT5670_PDM2_L_SFT 11
531 #define RT5670_M_PDM2_L (0x1 << 10)
532 #define RT5670_M_PDM2_L_SFT 10
546 #define RT5670_G_IN_L_RM_L_MASK (0x7 << 10)
547 #define RT5670_G_IN_L_RM_L_SFT 10
568 #define RT5670_G_IN_R_RM_R_MASK (0x7 << 10)
569 #define RT5670_G_IN_R_RM_R_SFT 10
614 #define RT5670_G_MONOMIX_MASK (0x1 << 10)
615 #define RT5670_G_MONOMIX_SFT 10
626 #define RT5670_G_BST2_OM_L_MASK (0x7 << 10)
627 #define RT5670_G_BST2_OM_L_SFT 10
638 #define RT5670_G_DAC_L2_OM_L_MASK (0x7 << 10)
639 #define RT5670_G_DAC_L2_OM_L_SFT 10
656 #define RT5670_G_BST2_OM_R_MASK (0x7 << 10)
657 #define RT5670_G_BST2_OM_R_SFT 10
668 #define RT5670_G_DAC_R2_OM_R_MASK (0x7 << 10)
669 #define RT5670_G_DAC_R2_OM_R_SFT 10
692 #define RT5670_G_LOUTMIX_MASK (0x1 << 11)
693 #define RT5670_G_LOUTMIX_SFT 11
702 #define RT5670_PWR_DAC_R1 (0x1 << 11)
703 #define RT5670_PWR_DAC_R1_BIT 11
724 #define RT5670_PWR_DAC_S1F (0x1 << 11)
725 #define RT5670_PWR_DAC_S1F_BIT 11
726 #define RT5670_PWR_DAC_MF_L (0x1 << 10)
727 #define RT5670_PWR_DAC_MF_L_BIT 10
746 #define RT5670_PWR_BG (0x1 << 11)
747 #define RT5670_PWR_BG_BIT 11
766 #define RT5670_PWR_MB1 (0x1 << 11)
767 #define RT5670_PWR_MB1_BIT 11
768 #define RT5670_PWR_MB2 (0x1 << 10)
769 #define RT5670_PWR_MB2_BIT 10
786 #define RT5670_PWR_RM_L (0x1 << 11)
787 #define RT5670_PWR_RM_L_BIT 11
788 #define RT5670_PWR_RM_R (0x1 << 10)
789 #define RT5670_PWR_RM_R_BIT 10
792 #define RT5670_PWR_HV_L (0x1 << 11)
793 #define RT5670_PWR_HV_L_BIT 11
794 #define RT5670_PWR_HV_R (0x1 << 10)
795 #define RT5670_PWR_HV_R_BIT 10
810 #define RT5670_I2S_O_CP_MASK (0x3 << 10)
811 #define RT5670_I2S_O_CP_SFT 10
812 #define RT5670_I2S_O_CP_OFF (0x0 << 10)
813 #define RT5670_I2S_O_CP_U_LAW (0x1 << 10)
814 #define RT5670_I2S_O_CP_A_LAW (0x2 << 10)
858 #define RT5670_I2S_BCLK_MS2_MASK (0x1 << 11)
859 #define RT5670_I2S_BCLK_MS2_SFT 11
860 #define RT5670_I2S_BCLK_MS2_32 (0x0 << 11)
861 #define RT5670_I2S_BCLK_MS2_64 (0x1 << 11)
912 #define RT5670_DAHPF_EN (0x1 << 11)
913 #define RT5670_DAHPF_EN_SFT 11
914 #define RT5670_ADHPF_EN (0x1 << 10)
915 #define RT5670_ADHPF_EN_SFT 10
934 #define RT5670_DMIC_2_DP_MASK (0x1 << 10)
935 #define RT5670_DMIC_2_DP_SFT 10
936 #define RT5670_DMIC_2_DP_GPIO8 (0x0 << 10)
937 #define RT5670_DMIC_2_DP_IN3N (0x1 << 10)
971 #define RT5670_PLL1_SRC_MASK (0x7 << 11)
972 #define RT5670_PLL1_SRC_SFT 11
973 #define RT5670_PLL1_SRC_MCLK (0x0 << 11)
974 #define RT5670_PLL1_SRC_BCLK1 (0x1 << 11)
975 #define RT5670_PLL1_SRC_BCLK2 (0x2 << 11)
976 #define RT5670_PLL1_SRC_BCLK3 (0x3 << 11)
996 #define RT5670_PLL_M_BP (0x1 << 11)
997 #define RT5670_PLL_M_BP_SFT 11
1056 #define RT5670_HP_OVCD_MASK (0x1 << 10)
1057 #define RT5670_HP_OVCD_SFT 10
1058 #define RT5670_HP_OVCD_DIS (0x0 << 10)
1059 #define RT5670_HP_OVCD_EN (0x1 << 10)
1082 #define RT5670_CLSD_OM_MASK (0x1 << 11)
1083 #define RT5670_CLSD_OM_SFT 11
1084 #define RT5670_CLSD_OM_MONO (0x0 << 11)
1085 #define RT5670_CLSD_OM_STO (0x1 << 11)
1086 #define RT5670_CLSD_SCH_MASK (0x1 << 10)
1087 #define RT5670_CLSD_SCH_SFT 10
1088 #define RT5670_CLSD_SCH_L (0x0 << 10)
1089 #define RT5670_CLSD_SCH_S (0x1 << 10)
1146 #define RT5670_BPS_MASK (0x1 << 11)
1147 #define RT5670_BPS_SFT 11
1148 #define RT5670_BPS_DIS (0x0 << 11)
1149 #define RT5670_BPS_EN (0x1 << 11)
1150 #define RT5670_FAST_UPDN_MASK (0x1 << 10)
1151 #define RT5670_FAST_UPDN_SFT 10
1152 #define RT5670_FAST_UPDN_DIS (0x0 << 10)
1153 #define RT5670_FAST_UPDN_EN (0x1 << 10)
1190 #define RT5670_OSW_L_MASK (0x1 << 11)
1191 #define RT5670_OSW_L_SFT 11
1192 #define RT5670_OSW_L_DIS (0x0 << 11)
1193 #define RT5670_OSW_L_EN (0x1 << 11)
1194 #define RT5670_OSW_R_MASK (0x1 << 10)
1195 #define RT5670_OSW_R_SFT 10
1196 #define RT5670_OSW_R_DIS (0x0 << 10)
1197 #define RT5670_OSW_R_EN (0x1 << 10)
1237 #define RT5670_MIC1_OVCD_MASK (0x1 << 11)
1238 #define RT5670_MIC1_OVCD_SFT 11
1239 #define RT5670_MIC1_OVCD_DIS (0x0 << 11)
1240 #define RT5670_MIC1_OVCD_EN (0x1 << 11)
1403 #define RT5670_JD_HP_MASK (0x1 << 11)
1404 #define RT5670_JD_HP_SFT 11
1405 #define RT5670_JD_HP_DIS (0x0 << 11)
1406 #define RT5670_JD_HP_EN (0x1 << 11)
1407 #define RT5670_JD_HP_TRG_MASK (0x1 << 10)
1408 #define RT5670_JD_HP_TRG_SFT 10
1409 #define RT5670_JD_HP_TRG_LO (0x0 << 10)
1410 #define RT5670_JD_HP_TRG_HI (0x1 << 10)
1469 #define RT5670_JD_P_MASK (0x1 << 11)
1470 #define RT5670_JD_P_SFT 11
1471 #define RT5670_JD_P_NOR (0x0 << 11)
1472 #define RT5670_JD_P_INV (0x1 << 11)
1473 #define RT5670_OT_P_MASK (0x1 << 10)
1474 #define RT5670_OT_P_SFT 10
1475 #define RT5670_OT_P_NOR (0x0 << 10)
1476 #define RT5670_OT_P_INV (0x1 << 10)
1491 #define RT5670_MB1_OC_STKY_MASK (0x1 << 11)
1492 #define RT5670_MB1_OC_STKY_SFT 11
1493 #define RT5670_MB1_OC_STKY_DIS (0x0 << 11)
1494 #define RT5670_MB1_OC_STKY_EN (0x1 << 11)
1495 #define RT5670_MB2_OC_STKY_MASK (0x1 << 10)
1496 #define RT5670_MB2_OC_STKY_SFT 10
1497 #define RT5670_MB2_OC_STKY_DIS (0x0 << 10)
1498 #define RT5670_MB2_OC_STKY_EN (0x1 << 10)
1526 #define RT5670_GP4_PIN_MASK (0x1 << 11)
1527 #define RT5670_GP4_PIN_SFT 11
1528 #define RT5670_GP4_PIN_GPIO4 (0x0 << 11)
1529 #define RT5670_GP4_PIN_DMIC2_SDA (0x1 << 11)
1530 #define RT5670_DP_SIG_MASK (0x1 << 10)
1531 #define RT5670_DP_SIG_SFT 10
1532 #define RT5670_DP_SIG_TEST (0x0 << 10)
1533 #define RT5670_DP_SIG_AP (0x1 << 10)
1570 #define RT5670_GP4_PF_MASK (0x1 << 11)
1571 #define RT5670_GP4_PF_SFT 11
1572 #define RT5670_GP4_PF_IN (0x0 << 11)
1573 #define RT5670_GP4_PF_OUT (0x1 << 11)
1574 #define RT5670_GP4_OUT_MASK (0x1 << 10)
1575 #define RT5670_GP4_OUT_SFT 10
1576 #define RT5670_GP4_OUT_LO (0x0 << 10)
1577 #define RT5670_GP4_OUT_HI (0x1 << 10)
1698 #define RT5670_3D_1F_MIX_MASK (0x3 << 11)
1699 #define RT5670_3D_1F_MIX_SFT 11
1700 #define RT5670_3D_HP_M_MASK (0x1 << 10)
1701 #define RT5670_3D_HP_M_SFT 10
1702 #define RT5670_3D_HP_M_SUR (0x0 << 10)
1703 #define RT5670_3D_HP_M_FRO (0x1 << 10)
1720 #define RT5670_1ST_HPF_MASK (0x1 << 11)
1721 #define RT5670_1ST_HPF_SFT 11
1722 #define RT5670_1ST_HPF_DIS (0x0 << 11)
1723 #define RT5670_1ST_HPF_EN (0x1 << 11)
1736 #define RT5670_SI_DAC_MASK (0x1 << 11)
1737 #define RT5670_SI_DAC_SFT 11
1738 #define RT5670_SI_DAC_AUTO (0x0 << 11)
1739 #define RT5670_SI_DAC_TEST (0x1 << 11)
1740 #define RT5670_DC_CAL_M_MASK (0x1 << 10)
1741 #define RT5670_DC_CAL_M_SFT 10
1742 #define RT5670_DC_CAL_M_CAL (0x0 << 10)
1743 #define RT5670_DC_CAL_M_NOR (0x1 << 10)
1789 #define RT5670_ZCD_DIG_MASK (0x1 << 11)
1790 #define RT5670_ZCD_DIG_SFT 11
1791 #define RT5670_ZCD_DIG_DIS (0x0 << 11)
1792 #define RT5670_ZCD_DIG_EN (0x1 << 11)
1793 #define RT5670_ZCD_MASK (0x1 << 10)
1794 #define RT5670_ZCD_SFT 10
1795 #define RT5670_ZCD_PD (0x0 << 10)
1796 #define RT5670_ZCD_PU (0x1 << 10)
1815 #define RT5670_TDM_DATA_MODE_SEL (0x1 << 11)
1816 #define RT5670_TDM_DATA_MODE_NOR (0x0 << 11)
1817 #define RT5670_TDM_DATA_MODE_50FS (0x1 << 11)
1839 #define RT5670_WND_FC_NW_MASK (0x3f << 10)
1840 #define RT5670_WND_FC_NW_SFT 10
1859 #define RT5670_WND_WIND_MASK (0x1 << 13) /* Read-Only */
1861 #define RT5670_WND_STRONG_MASK (0x1 << 12) /* Read-Only */
1872 #define RT5670_DP_SPK_MASK (0x1 << 10)
1873 #define RT5670_DP_SPK_SFT 10
1874 #define RT5670_DP_SPK_DIS (0x0 << 10)
1875 #define RT5670_DP_SPK_EN (0x1 << 10)
1912 #define RT5670_IF1_ADC1_IN2_SEL (0x1 << 11)
1913 #define RT5670_IF1_ADC1_IN2_SFT 11
1914 #define RT5670_IF1_ADC2_IN1_SEL (0x1 << 10)
1915 #define RT5670_IF1_ADC2_IN1_SFT 10