Lines Matching full:15
182 #define RT5640_L_MUTE (0x1 << 15)
183 #define RT5640_L_MUTE_SFT 15
212 #define RT5640_INL_SEL_MASK (0x1 << 15)
213 #define RT5640_INL_SEL_SFT 15
214 #define RT5640_INL_SEL_IN4P (0x0 << 15)
215 #define RT5640_INL_SEL_MONOP (0x1 << 15)
311 #define RT5640_M_ADCMIX_L (0x1 << 15)
312 #define RT5640_M_ADCMIX_L_SFT 15
369 #define RT5640_M_STO_L_DAC_L (0x1 << 15)
370 #define RT5640_M_STO_L_DAC_L_SFT 15
387 #define RT5640_RXDP_SRC_MASK (0x1 << 15)
388 #define RT5640_RXDP_SRC_SFT 15
389 #define RT5640_RXDP_SRC_NOR (0x0 << 15)
390 #define RT5640_RXDP_SRC_DIV3 (0x1 << 15)
544 #define RT5640_M_DAC2_HM (0x1 << 15)
545 #define RT5640_M_DAC2_HM_SFT 15
598 #define RT5640_M_DAC_R1_SPM_L (0x1 << 15)
599 #define RT5640_M_DAC_R1_SPM_L_SFT 15
622 #define RT5640_M_DAC_R2_MM (0x1 << 15)
623 #define RT5640_M_DAC_R2_MM_SFT 15
716 #define RT5640_M_DAC_L1_LM (0x1 << 15)
717 #define RT5640_M_DAC_L1_LM_SFT 15
728 #define RT5640_PWR_I2S1 (0x1 << 15)
729 #define RT5640_PWR_I2S1_BIT 15
748 #define RT5640_PWR_ADC_SF (0x1 << 15)
749 #define RT5640_PWR_ADC_SF_BIT 15
758 #define RT5640_PWR_VREF1 (0x1 << 15)
759 #define RT5640_PWR_VREF1_BIT 15
786 #define RT5640_PWR_BST1 (0x1 << 15)
787 #define RT5640_PWR_BST1_BIT 15
800 #define RT5640_PWR_OM_L (0x1 << 15)
801 #define RT5640_PWR_OM_L_BIT 15
814 #define RT5640_PWR_SV_L (0x1 << 15)
815 #define RT5640_PWR_SV_L_BIT 15
832 #define RT5640_I2S_MS_MASK (0x1 << 15)
833 #define RT5640_I2S_MS_SFT 15
834 #define RT5640_I2S_MS_M (0x0 << 15)
835 #define RT5640_I2S_MS_S (0x1 << 15)
872 #define RT5640_I2S_BCLK_MS1_MASK (0x1 << 15)
873 #define RT5640_I2S_BCLK_MS1_SFT 15
874 #define RT5640_I2S_BCLK_MS1_32 (0x0 << 15)
875 #define RT5640_I2S_BCLK_MS1_64 (0x1 << 15)
946 #define RT5640_DMIC_1_EN_MASK (0x1 << 15)
947 #define RT5640_DMIC_1_EN_SFT 15
948 #define RT5640_DMIC_1_DIS (0x0 << 15)
949 #define RT5640_DMIC_1_EN (0x1 << 15)
1016 #define RT5640_STO_T_MASK (0x1 << 15)
1017 #define RT5640_STO_T_SFT 15
1018 #define RT5640_STO_T_SCLK (0x0 << 15)
1019 #define RT5640_STO_T_LRCK1 (0x1 << 15)
1042 #define RT5640_MDA_L_M_MASK (0x1 << 15)
1043 #define RT5640_MDA_L_M_SFT 15
1044 #define RT5640_MDA_L_M_NOR (0x0 << 15)
1045 #define RT5640_MDA_L_M_ASYN (0x1 << 15)
1129 #define RT5640_SMT_TRIG_MASK (0x1 << 15)
1130 #define RT5640_SMT_TRIG_SFT 15
1131 #define RT5640_SMT_TRIG_DIS (0x0 << 15)
1132 #define RT5640_SMT_TRIG_EN (0x1 << 15)
1248 #define RT5640_PVDD_DET_MASK (0x1 << 15)
1249 #define RT5640_PVDD_DET_SFT 15
1250 #define RT5640_PVDD_DET_DIS (0x0 << 15)
1251 #define RT5640_PVDD_DET_EN (0x1 << 15)
1258 #define RT5640_MIC1_BS_MASK (0x1 << 15)
1259 #define RT5640_MIC1_BS_SFT 15
1260 #define RT5640_MIC1_BS_9AV (0x0 << 15)
1261 #define RT5640_MIC1_BS_75AV (0x1 << 15)
1302 #define RT5640_EQ_SRC_MASK (0x1 << 15)
1303 #define RT5640_EQ_SRC_SFT 15
1304 #define RT5640_EQ_SRC_DAC (0x0 << 15)
1305 #define RT5640_EQ_SRC_ADC (0x1 << 15)
1358 #define RT5640_MT_MASK (0x1 << 15)
1359 #define RT5640_MT_SFT 15
1360 #define RT5640_MT_DIS (0x0 << 15)
1361 #define RT5640_MT_EN (0x1 << 15)
1364 #define RT5640_DRC_AGC_P_MASK (0x1 << 15)
1365 #define RT5640_DRC_AGC_P_SFT 15
1366 #define RT5640_DRC_AGC_P_DAC (0x0 << 15)
1367 #define RT5640_DRC_AGC_P_ADC (0x1 << 15)
1420 #define RT5640_ANC_M_MASK (0x1 << 15)
1421 #define RT5640_ANC_M_SFT 15
1422 #define RT5640_ANC_M_NOR (0x0 << 15)
1423 #define RT5640_ANC_M_REV (0x1 << 15)
1559 #define RT5640_IRQ_JD_MASK (0x1 << 15)
1560 #define RT5640_IRQ_JD_SFT 15
1561 #define RT5640_IRQ_JD_BP (0x0 << 15)
1562 #define RT5640_IRQ_JD_NOR (0x1 << 15)
1585 #define RT5640_IRQ_MB1_OC_MASK (0x1 << 15)
1586 #define RT5640_IRQ_MB1_OC_SFT 15
1587 #define RT5640_IRQ_MB1_OC_BP (0x0 << 15)
1588 #define RT5640_IRQ_MB1_OC_NOR (0x1 << 15)
1622 #define RT5640_GP1_PIN_MASK (0x1 << 15)
1623 #define RT5640_GP1_PIN_SFT 15
1624 #define RT5640_GP1_PIN_GPIO1 (0x0 << 15)
1625 #define RT5640_GP1_PIN_IRQ (0x1 << 15)
1705 #define RT5640_DSP_BUSY_MASK (0x1 << 15)
1706 #define RT5640_DSP_BUSY_BIT 15
1789 #define RT5640_SCB_SWAP_MASK (0x1 << 15)
1790 #define RT5640_SCB_SWAP_SFT 15
1791 #define RT5640_SCB_SWAP_DIS (0x0 << 15)
1792 #define RT5640_SCB_SWAP_EN (0x1 << 15)
1799 #define RT5640_BB_MASK (0x1 << 15)
1800 #define RT5640_BB_SFT 15
1801 #define RT5640_BB_DIS (0x0 << 15)
1802 #define RT5640_BB_EN (0x1 << 15)
1821 #define RT5640_M_MP3_L_MASK (0x1 << 15)
1822 #define RT5640_M_MP3_L_SFT 15
1851 #define RT5640_3D_CF_MASK (0x1 << 15)
1852 #define RT5640_3D_CF_SFT 15
1853 #define RT5640_3D_CF_DIS (0x0 << 15)
1854 #define RT5640_3D_CF_EN (0x1 << 15)
1879 #define RT5640_2ND_HPF_MASK (0x1 << 15)
1880 #define RT5640_2ND_HPF_SFT 15
1881 #define RT5640_2ND_HPF_DIS (0x0 << 15)
1882 #define RT5640_2ND_HPF_EN (0x1 << 15)
1938 #define RT5640_SV_MASK (0x1 << 15)
1939 #define RT5640_SV_SFT 15
1940 #define RT5640_SV_DIS (0x0 << 15)
1941 #define RT5640_SV_EN (0x1 << 15)
1974 #define RT5640_ZCD_HP_MASK (0x1 << 15)
1975 #define RT5640_ZCD_HP_SFT 15
1976 #define RT5640_ZCD_HP_DIS (0x0 << 15)
1977 #define RT5640_ZCD_HP_EN (0x1 << 15)
1997 #define RT5640_3D_SPK_MASK (0x1 << 15)
1998 #define RT5640_3D_SPK_SFT 15
1999 #define RT5640_3D_SPK_DIS (0x0 << 15)
2000 #define RT5640_3D_SPK_EN (0x1 << 15)
2009 #define RT5640_WND_MASK (0x1 << 15)
2010 #define RT5640_WND_SFT 15
2011 #define RT5640_WND_DIS (0x0 << 15)
2012 #define RT5640_WND_EN (0x1 << 15)