Lines Matching +full:8 +full:- +full:9

1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5616.h -- RT5616 ALSA SoC audio driver
17 /* I/O - Output */
21 /* I/O - Input */
24 /* I/O - ADC/DAC/DMIC */
28 /* Mixer - D-D */
33 /* Mixer - ADC */
38 /* Mixer - DAC */
57 /* Format - ADC/DAC */
62 /* Function - Analog */
75 /* Function - Digital */
160 #define RT5616_L_VOL_MASK (0x3f << 8)
161 #define RT5616_L_VOL_SFT 8
172 #define RT5616_BST_MASK2 (0xf<<8)
173 #define RT5616_BST_SFT2 8
180 #define RT5616_INL_VOL_MASK (0x1f << 8)
181 #define RT5616_INL_VOL_SFT 8
190 #define RT5616_DAC_L1_VOL_MASK (0xff << 8)
191 #define RT5616_DAC_L1_VOL_SFT 8
196 #define RT5616_DAC_L2_VOL_MASK (0xff << 8)
197 #define RT5616_DAC_L2_VOL_SFT 8
202 #define RT5616_ADC_L_VOL_MASK (0x7f << 8)
203 #define RT5616_ADC_L_VOL_SFT 8
210 #define RT5616_MONO_ADC_L_VOL_MASK (0x7f << 8)
211 #define RT5616_MONO_ADC_L_VOL_SFT 8
246 #define RT5616_M_DAC_R1_MIXL (0x1 << 9)
247 #define RT5616_M_DAC_R1_MIXL_SFT 9
248 #define RT5616_DAC_R1_STO_L_VOL_MASK (0x1 << 8)
249 #define RT5616_DAC_R1_STO_L_VOL_SFT 8
270 #define RT5616_STO_DD_R2_L_VOL_MASK (0x1 << 9)
271 #define RT5616_STO_DD_R2_L_VOL_SFT 9
298 #define RT5616_M_DAC_R2_DAC_R (0x1 << 9)
299 #define RT5616_M_DAC_R2_DAC_R_SFT 9
300 #define RT5616_DAC_R2_DAC_R_VOL_MASK (0x1 << 8)
301 #define RT5616_DAC_R2_DAC_R_VOL_SFT 8
333 #define RT5616_RXDC_SEL_MASK (0x3 << 8)
334 #define RT5616_RXDC_SEL_SFT 8
335 #define RT5616_RXDC_SEL_NOR (0x0 << 8)
336 #define RT5616_RXDC_SEL_L2R (0x1 << 8)
337 #define RT5616_RXDC_SEL_R2L (0x2 << 8)
338 #define RT5616_RXDC_SEL_SWAP (0x3 << 8)
429 #define RT5616_G_DAC_L2_SM_L_MASK (0x3 << 8)
430 #define RT5616_G_DAC_L2_SM_L_SFT 8
451 #define RT5616_G_DAC_R2_SM_R_MASK (0x3 << 8)
452 #define RT5616_G_DAC_R2_SM_R_SFT 8
521 #define RT5616_M_IN2_L_OM_L (0x1 << 9)
522 #define RT5616_M_IN2_L_OM_L_SFT 9
551 #define RT5616_M_IN2_R_OM_R (0x1 << 9)
552 #define RT5616_M_IN2_R_OM_R_SFT 9
632 #define RT5616_PWR_PLL (0x1 << 9)
633 #define RT5616_PWR_PLL_BIT 9
666 #define RT5616_PWR_IN1_L (0x1 << 9)
667 #define RT5616_PWR_IN1_L_BIT 9
668 #define RT5616_PWR_IN1_R (0x1 << 8)
669 #define RT5616_PWR_IN1_R_BIT 8
685 #define RT5616_I2S_I_CP_MASK (0x3 << 8)
686 #define RT5616_I2S_I_CP_SFT 8
687 #define RT5616_I2S_I_CP_OFF (0x0 << 8)
688 #define RT5616_I2S_I_CP_U_LAW (0x1 << 8)
689 #define RT5616_I2S_I_CP_A_LAW (0x2 << 8)
759 #define RT5616_TDM_ADC_SEL_MASK (0x1 << 9)
760 #define RT5616_TDM_ADC_SEL_SFT 9
761 #define RT5616_TDM_ADC_SEL_NOR (0x0 << 9)
762 #define RT5616_TDM_ADC_SEL_SWAP (0x1 << 9)
763 #define RT5616_TDM_ADC_START_SEL_MASK (0x1 << 8)
764 #define RT5616_TDM_ADC_START_SEL_SFT 8
765 #define RT5616_TDM_ADC_START_SEL_SL0 (0x0 << 8)
766 #define RT5616_TDM_ADC_START_SEL_SL4 (0x1 << 8)
813 #define RT5616_TDM_END_EDGE_EN (0x1 << 9)
814 #define RT5616_TDM_END_EDGE_EN_SFT 9
815 #define RT5616_TDM_TRAN_EDGE_SEL_MASK (0x1 << 8)
816 #define RT5616_TDM_TRAN_EDGE_SEL_SFT 8
817 #define RT5616_TDM_TRAN_EDGE_SEL_POS (0x0 << 8)
818 #define RT5616_TDM_TRAN_EDGE_SEL_NEG (0x1 << 8)
873 #define RT5616_DMIC_1_M_MASK (0x1 << 9)
874 #define RT5616_DMIC_1_M_SFT 9
875 #define RT5616_DMIC_1_M_NOR (0x0 << 9)
876 #define RT5616_DMIC_1_M_ASYN (0x1 << 9)
912 #define RT5616_I2S2_RATE_MASK (0xf << 8)
913 #define RT5616_I2S2_RATE_SFT 8
930 #define RT5616_I2S2_PD_MASK (0x7 << 8)
931 #define RT5616_I2S2_PD_SFT 8
936 #define RT5616_FSI2_RATE_MASK (0xf << 8)
937 #define RT5616_FSI2_RATE_SFT 8
944 #define RT5616_HP_OC_TH_MASK (0x3 << 8)
945 #define RT5616_HP_OC_TH_SFT 8
946 #define RT5616_HP_OC_TH_90 (0x0 << 8)
947 #define RT5616_HP_OC_TH_105 (0x1 << 8)
948 #define RT5616_HP_OC_TH_120 (0x2 << 8)
949 #define RT5616_HP_OC_TH_135 (0x3 << 8)
956 #define RT5616_HP_L_SMT_MASK (0x1 << 9)
957 #define RT5616_HP_L_SMT_SFT 9
958 #define RT5616_HP_L_SMT_DIS (0x0 << 9)
959 #define RT5616_HP_L_SMT_EN (0x1 << 9)
960 #define RT5616_HP_R_SMT_MASK (0x1 << 8)
961 #define RT5616_HP_R_SMT_SFT 8
962 #define RT5616_HP_R_SMT_DIS (0x0 << 8)
963 #define RT5616_HP_R_SMT_EN (0x1 << 8)
1014 #define RT5616_MRES_MASK (0x3 << 8)
1015 #define RT5616_MRES_SFT 8
1016 #define RT5616_MRES_15MO (0x0 << 8)
1017 #define RT5616_MRES_25MO (0x1 << 8)
1018 #define RT5616_MRES_35MO (0x2 << 8)
1019 #define RT5616_MRES_45MO (0x3 << 8)
1034 #define RT5616_CP_FQ1_MASK (0x7 << 8)
1035 #define RT5616_CP_FQ1_SFT 8
1058 #define RT5616_PM_HP_MASK (0x3 << 8)
1059 #define RT5616_PM_HP_SFT 8
1060 #define RT5616_PM_HP_LV (0x0 << 8)
1061 #define RT5616_PM_HP_MV (0x1 << 8)
1062 #define RT5616_PM_HP_HV (0x2 << 8)
1083 #define RT5616_MIC1_OVTH_MASK (0x3 << 9)
1084 #define RT5616_MIC1_OVTH_SFT 9
1085 #define RT5616_MIC1_OVTH_600UA (0x0 << 9)
1086 #define RT5616_MIC1_OVTH_1500UA (0x1 << 9)
1087 #define RT5616_MIC1_OVTH_2000UA (0x2 << 9)
1104 #define RT5616_JD_MODE_SEL_MASK (0x3 << 8)
1105 #define RT5616_JD_MODE_SEL_SFT 8
1106 #define RT5616_JD_MODE_SEL_M0 (0x0 << 8)
1107 #define RT5616_JD_MODE_SEL_M1 (0x1 << 8)
1108 #define RT5616_JD_MODE_SEL_M2 (0x2 << 8)
1136 #define RT5616_EQ_DITH_MASK (0x3 << 8)
1137 #define RT5616_EQ_DITH_SFT 8
1138 #define RT5616_EQ_DITH_NOR (0x0 << 8)
1139 #define RT5616_EQ_DITH_LSB (0x1 << 8)
1140 #define RT5616_EQ_DITH_LSB_1 (0x2 << 8)
1141 #define RT5616_EQ_DITH_LSB_2 (0x3 << 8)
1160 #define RT5616_EQ_HPF1_M_MASK (0x1 << 8)
1161 #define RT5616_EQ_HPF1_M_SFT 8
1162 #define RT5616_EQ_HPF1_M_HI (0x0 << 8)
1163 #define RT5616_EQ_HPF1_M_1ST (0x1 << 8)
1215 #define RT5616_DRC_AGC_AR_MASK (0x1f << 8)
1216 #define RT5616_DRC_AGC_AR_SFT 8
1229 #define RT5616_DRC_AGC_POB_MASK (0x3f << 8)
1230 #define RT5616_DRC_AGC_POB_SFT 8
1278 #define RT5616_JD_SPL_MASK (0x1 << 9)
1279 #define RT5616_JD_SPL_SFT 9
1280 #define RT5616_JD_SPL_DIS (0x0 << 9)
1281 #define RT5616_JD_SPL_EN (0x1 << 9)
1282 #define RT5616_JD_SPL_TRG_MASK (0x1 << 8)
1283 #define RT5616_JD_SPL_TRG_SFT 8
1284 #define RT5616_JD_SPL_TRG_LO (0x0 << 8)
1285 #define RT5616_JD_SPL_TRG_HI (0x1 << 8)
1304 #define RT5616_JD_TRG_SEL_MASK (0x7 << 9)
1305 #define RT5616_JD_TRG_SEL_SFT 9
1306 #define RT5616_JD_TRG_SEL_GPIO (0x0 << 9)
1307 #define RT5616_JD_TRG_SEL_JD1_1 (0x1 << 9)
1308 #define RT5616_JD_TRG_SEL_JD1_2 (0x2 << 9)
1309 #define RT5616_JD_TRG_SEL_JD2 (0x3 << 9)
1310 #define RT5616_JD_TRG_SEL_JD3 (0x4 << 9)
1311 #define RT5616_JD3_IRQ_EN (0x1 << 8)
1312 #define RT5616_JD3_IRQ_EN_SFT 8
1331 #define RT5616_JD1_1_IRQ_EN (0x1 << 9)
1332 #define RT5616_JD1_1_IRQ_EN_SFT 9
1333 #define RT5616_JD1_1_EN_STKY (0x1 << 8)
1334 #define RT5616_JD1_1_EN_STKY_SFT 8
1382 #define RT5616_STA_GP5 (0x1 << 9)
1383 #define RT5616_STA_GP5_BIT 9
1384 #define RT5616_STA_GP1 (0x1 << 8)
1385 #define RT5616_STA_GP1_BIT 8
1404 #define RT5616_GPIO_M_MASK (0x1 << 9)
1405 #define RT5616_GPIO_M_SFT 9
1406 #define RT5616_GPIO_M_FLT (0x0 << 9)
1407 #define RT5616_GPIO_M_PH (0x1 << 9)
1408 #define RT5616_I2S2_SEL_MASK (0x1 << 8)
1409 #define RT5616_I2S2_SEL_SFT 8
1410 #define RT5616_I2S2_SEL_I2S (0x0 << 8)
1411 #define RT5616_I2S2_SEL_GPIO (0x1 << 8)
1454 #define RT5616_GP4_P_MASK (0x1 << 9)
1455 #define RT5616_GP4_P_SFT 9
1456 #define RT5616_GP4_P_NOR (0x0 << 9)
1457 #define RT5616_GP4_P_INV (0x1 << 9)
1458 #define RT5616_GP3_DR_MASK (0x1 << 8)
1459 #define RT5616_GP3_DR_SFT 8
1460 #define RT5616_GP3_DR_IN (0x0 << 8)
1461 #define RT5616_GP3_DR_OUT (0x1 << 8)
1496 #define RT5616_GP8_DR_MASK (0x1 << 8)
1497 #define RT5616_GP8_DR_SFT 8
1498 #define RT5616_GP8_DR_IN (0x0 << 8)
1499 #define RT5616_GP8_DR_OUT (0x1 << 8)
1554 #define RT5616_M_BB_L_MASK (0x1 << 9)
1555 #define RT5616_M_BB_L_SFT 9
1556 #define RT5616_M_BB_R_MASK (0x1 << 8)
1557 #define RT5616_M_BB_R_SFT 8
1574 #define RT5616_EG_MP3_MASK (0x1f << 8)
1575 #define RT5616_EG_MP3_SFT 8
1590 #define RT5616_OG_MP3_MASK (0x1f << 8)
1591 #define RT5616_OG_MP3_SFT 8
1614 #define RT5616_M_3D_HRTF_MASK (0x1 << 9)
1615 #define RT5616_M_3D_HRTF_SFT 9
1616 #define RT5616_M_3D_D2H_MASK (0x1 << 8)
1617 #define RT5616_M_3D_D2H_SFT 8
1630 #define RT5616_HPF_CF_R_MASK (0x7 << 8)
1631 #define RT5616_HPF_CF_R_SFT 8
1642 #define RT5616_HPF_CF_L_NUM_MASK (0x3f << 8)
1643 #define RT5616_HPF_CF_L_NUM_SFT 8
1656 #define RT5616_DC_CAL_MASK (0x1 << 9)
1657 #define RT5616_DC_CAL_SFT 9
1658 #define RT5616_DC_CAL_DIS (0x0 << 9)
1659 #define RT5616_DC_CAL_EN (0x1 << 9)
1721 #define RT5616_I2S2_MS_SP_MASK (0x1 << 8)
1722 #define RT5616_I2S2_MS_SP_SEL 8
1723 #define RT5616_I2S2_MS_SP_64 (0x0 << 8)
1724 #define RT5616_I2S2_MS_SP_50 (0x1 << 8)
1740 #define RT5616_3D_SPK_CG_MASK (0x1f << 8)
1741 #define RT5616_3D_SPK_CG_SFT 8
1771 /* Wind Noise Detection Control 8 (0x73) */
1772 #define RT5616_WND_WIND_MASK (0x1 << 13) /* Read-Only */
1774 #define RT5616_WND_STRONG_MASK (0x1 << 12) /* Read-Only */