soc/codecs/jz4740.c

23 #define JZ4740_REG_CODEC_1 0x0
24 #define JZ4740_REG_CODEC_2 0x4
44 #define JZ4740_CODEC_1_RESET BIT(0)
55 #define JZ4740_CODEC_2_INPUT_VOLUME_MASK		0x1f0000
56 #define JZ4740_CODEC_2_SAMPLE_RATE_MASK			0x000f00
57 #define JZ4740_CODEC_2_MIC_BOOST_GAIN_MASK		0x000030
58 #define JZ4740_CODEC_2_HEADPHONE_VOLUME_MASK	0x000003
63 #define JZ4740_CODEC_2_HEADPHONE_VOLUME_OFFSET	 0
66 	{ JZ4740_REG_CODEC_1, 0x021b2302 },
67 	{ JZ4740_REG_CODEC_2, 0x00170803 },
75 	0, 2, TLV_DB_SCALE_ITEM(0, 600, 0),
76 	3, 3, TLV_DB_SCALE_ITEM(2000, 0, 0)
79 static const DECLARE_TLV_DB_SCALE(jz4740_out_tlv, 0, 200, 0);
80 static const DECLARE_TLV_DB_SCALE(jz4740_in_tlv, -3450, 150, 0);
84 			JZ4740_CODEC_2_HEADPHONE_VOLUME_OFFSET, 3, 0,
87 			JZ4740_CODEC_2_INPUT_VOLUME_OFFSET, 31, 0,
92 			JZ4740_CODEC_2_MIC_BOOST_GAIN_OFFSET, 3, 0,
98 			JZ4740_CODEC_1_SW1_ENABLE_OFFSET, 1, 0),
100 			JZ4740_CODEC_1_SW2_ENABLE_OFFSET, 1, 0),
105 			JZ4740_CODEC_1_LINE_ENABLE_OFFSET, 1, 0),
107 			JZ4740_CODEC_1_MIC_ENABLE_OFFSET, 1, 0),
112 			JZ4740_CODEC_1_ADC_ENABLE_OFFSET, 0),
114 			JZ4740_CODEC_1_DAC_ENABLE_OFFSET, 0),
121 	SND_SOC_DAPM_MIXER_NAMED_CTL("Input Mixer", SND_SOC_NOPM, 0, 0,
124 	SND_SOC_DAPM_MIXER("Line Input", SND_SOC_NOPM, 0, 0, NULL, 0),
158 		val = 0;  in jz4740_codec_hw_params()
193 	return 0;  in jz4740_codec_hw_params()
227 		JZ4740_CODEC_1_SUSPEND | JZ4740_CODEC_1_RESET, 0);  in jz4740_codec_wakeup()
247 		value = 0;  in jz4740_codec_set_bias_level()
276 	return 0;  in jz4740_codec_set_bias_level()
286 	return 0;  in jz4740_codec_dev_probe()
328 	base = devm_platform_ioremap_resource(pdev, 0);  in jz4740_codec_probe()