162  * struct cs4270_mode_ratios - clock ratio tables
163  * @ratio: the ratio of MCLK to the sample rate
165  *              this ratio
166  * @mclk: the Ratio Select bits to set in the Mode Control register for this
167  *        ratio
182  * In situations where a single ratio is represented by multiple speed
183  * modes, we favor the slowest speed.  E.g, for a ratio of 128, we pick
194 	unsigned int ratio;  member
241  * by the CS4270.  The ratio of MCLK / Fs must be equal to one of nine
337 	unsigned int ratio;  in cs4270_hw_params()  local
340 	/* Figure out which MCLK/LRCK ratio to use */  in cs4270_hw_params()
343 	ratio = cs4270->mclk / rate;	/* MCLK/LRCK ratio */  in cs4270_hw_params()
346 		if (cs4270_mode_ratios[i].ratio == ratio)  in cs4270_hw_params()
351 		/* We did not find a matching ratio */  in cs4270_hw_params()
352 		dev_err(component->dev, "could not find matching ratio\n");  in cs4270_hw_params()