Lines Matching +full:adc +full:- +full:joystick
1 // SPDX-License-Identifier: GPL-2.0-or-later
30 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
120 #define BA0_DMR_SIZE20 (1<<20) /* Sample is 20-bit */
124 #define BA0_DMR_SIZE8 (1<<16) /* Sample is 8-bit */
130 #define BA0_DMR_AUTO (1<<4) /* Auto-Initialize */
215 #define BA0_SLT12O 0x041c /* Slot 12 GPIO Output Register for AC-Link */
219 #define BA0_SERMC_ODSEN2 (1<<25) /* On-Demand Support Enable ASDIN2 */
220 #define BA0_SERMC_ODSEN1 (1<<24) /* On-Demand Support Enable ASDIN1 */
241 #define BA0_SLT12M 0x045c /* Slot 12 Monitor Register for Primary AC-Link */
255 #define BA0_ACOSV_SLV(x) (1<<((x)-3))
261 #define BA0_ACISV_SLV(x) (1<<((x)-3))
265 #define BA0_JSPT 0x0480 /* Joystick poll/trigger */
266 #define BA0_JSCTL 0x0484 /* Joystick control */
267 #define BA0_JSC1 0x0488 /* Joystick control */
268 #define BA0_JSC2 0x048c /* Joystick control */
282 #define BA0_MIDSR_RDA (1<<15) /* Sticky bit (RBE 1->0) */
283 #define BA0_MIDSR_TBE (1<<14) /* Sticky bit (TBF 0->1) */
290 #define BA0_AODSD1 0x04a8 /* AC'97 On-Demand Slot Disable for primary link (ro) */
291 #define BA0_AODSD1_NDS(x) (1<<((x)-3))
293 #define BA0_AODSD2 0x04ac /* AC'97 On-Demand Slot Disable for secondary link (ro) */
294 #define BA0_AODSD2_NDS(x) (1<<((x)-3))
297 #define BA0_SLT12M2 0x04dc /* Slot 12 Monitor Register 2 for secondary AC-link */
312 #define BA0_SSPM_JSEN (1<<3) /* Joystick Enable */
313 #define BA0_SSPM_ACLEN (1<<2) /* Serial Port Engine and AC-Link Enable */
316 #define BA0_DACSR 0x0744 /* DAC Sample Rate - Playback SRC */
317 #define BA0_ADCSR 0x0748 /* ADC Sample Rate - Capture SRC */
338 /* Source Slot Numbers - Playback */
351 /* Source Slot Numbers - Capture */
365 /* Source Slot Numbers - Others */
372 /* joystick bits */
502 writel(val, chip->ba0 + offset); in snd_cs4281_pokeBA0()
507 return readl(chip->ba0 + offset); in snd_cs4281_peekBA0()
520 struct cs4281 *chip = ac97->private_data; in snd_cs4281_ac97_write()
529 * set DCV - will clear when process completed in snd_cs4281_ac97_write()
530 * reset CRW - Write command in snd_cs4281_ac97_write()
531 * set VFRM - valid frame enabled in snd_cs4281_ac97_write()
532 * set ESYN - ASYNC generation enabled in snd_cs4281_ac97_write()
533 * set RSTN - ARST# inactive, AC97 codec not reset in snd_cs4281_ac97_write()
538 BA0_ACCTL_ESYN | (ac97->num ? BA0_ACCTL_TC : 0)); in snd_cs4281_ac97_write()
552 dev_err(chip->card->dev, in snd_cs4281_ac97_write()
559 struct cs4281 *chip = ac97->private_data; in snd_cs4281_ac97_read()
564 volatile int ac97_num = ((volatile struct snd_ac97 *)ac97)->num; in snd_cs4281_ac97_read()
583 * set DCV - will clear when process completed in snd_cs4281_ac97_read()
584 * set CRW - Read command in snd_cs4281_ac97_read()
585 * set VFRM - valid frame enabled in snd_cs4281_ac97_read()
586 * set ESYN - ASYNC generation enabled in snd_cs4281_ac97_read()
587 * set RSTN - ARST# inactive, AC97 codec not reset in snd_cs4281_ac97_read()
613 dev_err(chip->card->dev, in snd_cs4281_ac97_read()
626 * VSTS - Valid Status in snd_cs4281_ac97_read()
633 dev_err(chip->card->dev, in snd_cs4281_ac97_read()
655 struct cs4281_dma *dma = substream->runtime->private_data; in snd_cs4281_trigger()
658 spin_lock(&chip->reg_lock); in snd_cs4281_trigger()
661 dma->valDCR |= BA0_DCR_MSK; in snd_cs4281_trigger()
662 dma->valFCR |= BA0_FCR_FEN; in snd_cs4281_trigger()
665 dma->valDCR &= ~BA0_DCR_MSK; in snd_cs4281_trigger()
666 dma->valFCR &= ~BA0_FCR_FEN; in snd_cs4281_trigger()
670 snd_cs4281_pokeBA0(chip, dma->regDMR, dma->valDMR & ~BA0_DMR_DMA); in snd_cs4281_trigger()
671 dma->valDMR |= BA0_DMR_DMA; in snd_cs4281_trigger()
672 dma->valDCR &= ~BA0_DCR_MSK; in snd_cs4281_trigger()
673 dma->valFCR |= BA0_FCR_FEN; in snd_cs4281_trigger()
677 dma->valDMR &= ~(BA0_DMR_DMA|BA0_DMR_POLL); in snd_cs4281_trigger()
678 dma->valDCR |= BA0_DCR_MSK; in snd_cs4281_trigger()
679 dma->valFCR &= ~BA0_FCR_FEN; in snd_cs4281_trigger()
681 if (dma->regFCR != BA0_FCR0) in snd_cs4281_trigger()
682 dma->valFCR &= ~BA0_FCR_FEN; in snd_cs4281_trigger()
685 spin_unlock(&chip->reg_lock); in snd_cs4281_trigger()
686 return -EINVAL; in snd_cs4281_trigger()
688 snd_cs4281_pokeBA0(chip, dma->regDMR, dma->valDMR); in snd_cs4281_trigger()
689 snd_cs4281_pokeBA0(chip, dma->regFCR, dma->valFCR); in snd_cs4281_trigger()
690 snd_cs4281_pokeBA0(chip, dma->regDCR, dma->valDCR); in snd_cs4281_trigger()
691 spin_unlock(&chip->reg_lock); in snd_cs4281_trigger()
724 dma->valDMR = BA0_DMR_TYPE_SINGLE | BA0_DMR_AUTO | in snd_cs4281_mode()
726 if (runtime->channels == 1) in snd_cs4281_mode()
727 dma->valDMR |= BA0_DMR_MONO; in snd_cs4281_mode()
728 if (snd_pcm_format_unsigned(runtime->format) > 0) in snd_cs4281_mode()
729 dma->valDMR |= BA0_DMR_USIGN; in snd_cs4281_mode()
730 if (snd_pcm_format_big_endian(runtime->format) > 0) in snd_cs4281_mode()
731 dma->valDMR |= BA0_DMR_BEND; in snd_cs4281_mode()
732 switch (snd_pcm_format_width(runtime->format)) { in snd_cs4281_mode()
733 case 8: dma->valDMR |= BA0_DMR_SIZE8; in snd_cs4281_mode()
734 if (runtime->channels == 1) in snd_cs4281_mode()
735 dma->valDMR |= BA0_DMR_SWAPC; in snd_cs4281_mode()
737 case 32: dma->valDMR |= BA0_DMR_SIZE20; break; in snd_cs4281_mode()
739 dma->frag = 0; /* for workaround */ in snd_cs4281_mode()
740 dma->valDCR = BA0_DCR_TCIE | BA0_DCR_MSK; in snd_cs4281_mode()
741 if (runtime->buffer_size != runtime->period_size) in snd_cs4281_mode()
742 dma->valDCR |= BA0_DCR_HTCIE; in snd_cs4281_mode()
744 snd_cs4281_pokeBA0(chip, dma->regDBA, runtime->dma_addr); in snd_cs4281_mode()
745 snd_cs4281_pokeBA0(chip, dma->regDBC, runtime->buffer_size - 1); in snd_cs4281_mode()
746 rec_mono = (chip->dma[1].valDMR & BA0_DMR_MONO) == BA0_DMR_MONO; in snd_cs4281_mode()
747 snd_cs4281_pokeBA0(chip, BA0_SRCSA, (chip->src_left_play_slot << 0) | in snd_cs4281_mode()
748 (chip->src_right_play_slot << 8) | in snd_cs4281_mode()
749 (chip->src_left_rec_slot << 16) | in snd_cs4281_mode()
750 ((rec_mono ? 31 : chip->src_right_rec_slot) << 24)); in snd_cs4281_mode()
754 if (dma->left_slot == chip->src_left_play_slot) { in snd_cs4281_mode()
755 unsigned int val = snd_cs4281_rate(runtime->rate, NULL); in snd_cs4281_mode()
756 snd_BUG_ON(dma->right_slot != chip->src_right_play_slot); in snd_cs4281_mode()
760 if (dma->left_slot == chip->src_left_rec_slot) { in snd_cs4281_mode()
761 unsigned int val = snd_cs4281_rate(runtime->rate, NULL); in snd_cs4281_mode()
762 snd_BUG_ON(dma->right_slot != chip->src_right_rec_slot); in snd_cs4281_mode()
768 if (dma->regFCR == BA0_FCR0) in snd_cs4281_mode()
769 snd_cs4281_pokeBA0(chip, dma->regFCR, snd_cs4281_peekBA0(chip, dma->regFCR) & ~BA0_FCR_FEN); in snd_cs4281_mode()
771 dma->valFCR = BA0_FCR_LS(dma->left_slot) | in snd_cs4281_mode()
772 BA0_FCR_RS(capture && (dma->valDMR & BA0_DMR_MONO) ? 31 : dma->right_slot) | in snd_cs4281_mode()
774 BA0_FCR_OF(dma->fifo_offset); in snd_cs4281_mode()
775 snd_cs4281_pokeBA0(chip, dma->regFCR, dma->valFCR | (capture ? BA0_FCR_PSH : 0)); in snd_cs4281_mode()
777 if (dma->regFCR == BA0_FCR0) in snd_cs4281_mode()
778 snd_cs4281_pokeBA0(chip, dma->regFCR, dma->valFCR | BA0_FCR_FEN); in snd_cs4281_mode()
780 snd_cs4281_pokeBA0(chip, dma->regFSIC, 0); in snd_cs4281_mode()
785 struct snd_pcm_runtime *runtime = substream->runtime; in snd_cs4281_playback_prepare()
786 struct cs4281_dma *dma = runtime->private_data; in snd_cs4281_playback_prepare()
789 spin_lock_irq(&chip->reg_lock); in snd_cs4281_playback_prepare()
791 spin_unlock_irq(&chip->reg_lock); in snd_cs4281_playback_prepare()
797 struct snd_pcm_runtime *runtime = substream->runtime; in snd_cs4281_capture_prepare()
798 struct cs4281_dma *dma = runtime->private_data; in snd_cs4281_capture_prepare()
801 spin_lock_irq(&chip->reg_lock); in snd_cs4281_capture_prepare()
803 spin_unlock_irq(&chip->reg_lock); in snd_cs4281_capture_prepare()
809 struct snd_pcm_runtime *runtime = substream->runtime; in snd_cs4281_pointer()
810 struct cs4281_dma *dma = runtime->private_data; in snd_cs4281_pointer()
814 dev_dbg(chip->card->dev, in snd_cs4281_pointer()
816 snd_cs4281_peekBA0(chip, dma->regDCC), runtime->buffer_size, in snd_cs4281_pointer()
819 return runtime->buffer_size - in snd_cs4281_pointer()
820 snd_cs4281_peekBA0(chip, dma->regDCC) - 1; in snd_cs4281_pointer()
876 struct snd_pcm_runtime *runtime = substream->runtime; in snd_cs4281_playback_open()
879 dma = &chip->dma[0]; in snd_cs4281_playback_open()
880 dma->substream = substream; in snd_cs4281_playback_open()
881 dma->left_slot = 0; in snd_cs4281_playback_open()
882 dma->right_slot = 1; in snd_cs4281_playback_open()
883 runtime->private_data = dma; in snd_cs4281_playback_open()
884 runtime->hw = snd_cs4281_playback; in snd_cs4281_playback_open()
886 that although CS4297A rev B reports 18-bit ADC resolution, in snd_cs4281_playback_open()
887 samples are 20-bit */ in snd_cs4281_playback_open()
895 struct snd_pcm_runtime *runtime = substream->runtime; in snd_cs4281_capture_open()
898 dma = &chip->dma[1]; in snd_cs4281_capture_open()
899 dma->substream = substream; in snd_cs4281_capture_open()
900 dma->left_slot = 10; in snd_cs4281_capture_open()
901 dma->right_slot = 11; in snd_cs4281_capture_open()
902 runtime->private_data = dma; in snd_cs4281_capture_open()
903 runtime->hw = snd_cs4281_capture; in snd_cs4281_capture_open()
905 that although CS4297A rev B reports 18-bit ADC resolution, in snd_cs4281_capture_open()
906 samples are 20-bit */ in snd_cs4281_capture_open()
913 struct cs4281_dma *dma = substream->runtime->private_data; in snd_cs4281_playback_close()
915 dma->substream = NULL; in snd_cs4281_playback_close()
921 struct cs4281_dma *dma = substream->runtime->private_data; in snd_cs4281_capture_close()
923 dma->substream = NULL; in snd_cs4281_capture_close()
948 err = snd_pcm_new(chip->card, "CS4281", device, 1, 1, &pcm); in snd_cs4281_pcm()
955 pcm->private_data = chip; in snd_cs4281_pcm()
956 pcm->info_flags = 0; in snd_cs4281_pcm()
957 strcpy(pcm->name, "CS4281"); in snd_cs4281_pcm()
958 chip->pcm = pcm; in snd_cs4281_pcm()
960 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, &chip->pci->dev, in snd_cs4281_pcm()
975 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in snd_cs4281_info_volume()
976 uinfo->count = 2; in snd_cs4281_info_volume()
977 uinfo->value.integer.min = 0; in snd_cs4281_info_volume()
978 uinfo->value.integer.max = CS_VOL_MASK; in snd_cs4281_info_volume()
986 int regL = (kcontrol->private_value >> 16) & 0xffff; in snd_cs4281_get_volume()
987 int regR = kcontrol->private_value & 0xffff; in snd_cs4281_get_volume()
990 volL = CS_VOL_MASK - (snd_cs4281_peekBA0(chip, regL) & CS_VOL_MASK); in snd_cs4281_get_volume()
991 volR = CS_VOL_MASK - (snd_cs4281_peekBA0(chip, regR) & CS_VOL_MASK); in snd_cs4281_get_volume()
993 ucontrol->value.integer.value[0] = volL; in snd_cs4281_get_volume()
994 ucontrol->value.integer.value[1] = volR; in snd_cs4281_get_volume()
1003 int regL = (kcontrol->private_value >> 16) & 0xffff; in snd_cs4281_put_volume()
1004 int regR = kcontrol->private_value & 0xffff; in snd_cs4281_put_volume()
1007 volL = CS_VOL_MASK - (snd_cs4281_peekBA0(chip, regL) & CS_VOL_MASK); in snd_cs4281_put_volume()
1008 volR = CS_VOL_MASK - (snd_cs4281_peekBA0(chip, regR) & CS_VOL_MASK); in snd_cs4281_put_volume()
1010 if (ucontrol->value.integer.value[0] != volL) { in snd_cs4281_put_volume()
1011 volL = CS_VOL_MASK - (ucontrol->value.integer.value[0] & CS_VOL_MASK); in snd_cs4281_put_volume()
1015 if (ucontrol->value.integer.value[1] != volR) { in snd_cs4281_put_volume()
1016 volR = CS_VOL_MASK - (ucontrol->value.integer.value[1] & CS_VOL_MASK); in snd_cs4281_put_volume()
1023 static const DECLARE_TLV_DB_SCALE(db_scale_dsp, -4650, 150, 0);
1049 struct cs4281 *chip = bus->private_data; in snd_cs4281_mixer_free_ac97_bus()
1050 chip->ac97_bus = NULL; in snd_cs4281_mixer_free_ac97_bus()
1055 struct cs4281 *chip = ac97->private_data; in snd_cs4281_mixer_free_ac97()
1056 if (ac97->num) in snd_cs4281_mixer_free_ac97()
1057 chip->ac97_secondary = NULL; in snd_cs4281_mixer_free_ac97()
1059 chip->ac97 = NULL; in snd_cs4281_mixer_free_ac97()
1064 struct snd_card *card = chip->card; in snd_cs4281_mixer()
1072 if ((err = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus)) < 0) in snd_cs4281_mixer()
1074 chip->ac97_bus->private_free = snd_cs4281_mixer_free_ac97_bus; in snd_cs4281_mixer()
1079 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0) in snd_cs4281_mixer()
1081 if (chip->dual_codec) { in snd_cs4281_mixer()
1083 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97_secondary)) < 0) in snd_cs4281_mixer()
1101 struct cs4281 *chip = entry->private_data; in snd_cs4281_proc_read()
1104 snd_iprintf(buffer, "Spurious half IRQs : %u\n", chip->spurious_dhtc_irq); in snd_cs4281_proc_read()
1105 snd_iprintf(buffer, "Spurious end IRQs : %u\n", chip->spurious_dtc_irq); in snd_cs4281_proc_read()
1113 struct cs4281 *chip = entry->private_data; in snd_cs4281_BA0_read()
1115 if (copy_to_user_fromio(buf, chip->ba0 + pos, count)) in snd_cs4281_BA0_read()
1116 return -EFAULT; in snd_cs4281_BA0_read()
1125 struct cs4281 *chip = entry->private_data; in snd_cs4281_BA1_read()
1127 if (copy_to_user_fromio(buf, chip->ba1 + pos, count)) in snd_cs4281_BA1_read()
1128 return -EFAULT; in snd_cs4281_BA1_read()
1144 snd_card_ro_proc_new(chip->card, "cs4281", chip, snd_cs4281_proc_read); in snd_cs4281_proc_init()
1145 if (! snd_card_proc_new(chip->card, "cs4281_BA0", &entry)) { in snd_cs4281_proc_init()
1146 entry->content = SNDRV_INFO_CONTENT_DATA; in snd_cs4281_proc_init()
1147 entry->private_data = chip; in snd_cs4281_proc_init()
1148 entry->c.ops = &snd_cs4281_proc_ops_BA0; in snd_cs4281_proc_init()
1149 entry->size = CS4281_BA0_SIZE; in snd_cs4281_proc_init()
1151 if (! snd_card_proc_new(chip->card, "cs4281_BA1", &entry)) { in snd_cs4281_proc_init()
1152 entry->content = SNDRV_INFO_CONTENT_DATA; in snd_cs4281_proc_init()
1153 entry->private_data = chip; in snd_cs4281_proc_init()
1154 entry->c.ops = &snd_cs4281_proc_ops_BA1; in snd_cs4281_proc_init()
1155 entry->size = CS4281_BA1_SIZE; in snd_cs4281_proc_init()
1160 * joystick support
1205 if (axes[jst] == 0xFFFF) axes[jst] = -1; in snd_cs4281_gameport_cooked_read()
1222 return -1; in snd_cs4281_gameport_open()
1231 chip->gameport = gp = gameport_allocate_port(); in snd_cs4281_create_gameport()
1233 dev_err(chip->card->dev, in snd_cs4281_create_gameport()
1235 return -ENOMEM; in snd_cs4281_create_gameport()
1239 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci)); in snd_cs4281_create_gameport()
1240 gameport_set_dev_parent(gp, &chip->pci->dev); in snd_cs4281_create_gameport()
1241 gp->open = snd_cs4281_gameport_open; in snd_cs4281_create_gameport()
1242 gp->read = snd_cs4281_gameport_read; in snd_cs4281_create_gameport()
1243 gp->trigger = snd_cs4281_gameport_trigger; in snd_cs4281_create_gameport()
1244 gp->cooked_read = snd_cs4281_gameport_cooked_read; in snd_cs4281_create_gameport()
1257 if (chip->gameport) { in snd_cs4281_free_gameport()
1258 gameport_unregister_port(chip->gameport); in snd_cs4281_free_gameport()
1259 chip->gameport = NULL; in snd_cs4281_free_gameport()
1263 static inline int snd_cs4281_create_gameport(struct cs4281 *chip) { return -ENOSYS; } in snd_cs4281_create_gameport()
1275 /* Sound System Power Management - Turn Everything OFF */ in snd_cs4281_free()
1277 /* PCI interface - D3 state */ in snd_cs4281_free()
1278 pci_set_power_state(chip->pci, PCI_D3hot); in snd_cs4281_free()
1280 if (chip->irq >= 0) in snd_cs4281_free()
1281 free_irq(chip->irq, chip); in snd_cs4281_free()
1282 iounmap(chip->ba0); in snd_cs4281_free()
1283 iounmap(chip->ba1); in snd_cs4281_free()
1284 pci_release_regions(chip->pci); in snd_cs4281_free()
1285 pci_disable_device(chip->pci); in snd_cs4281_free()
1293 struct cs4281 *chip = device->device_data; in snd_cs4281_dev_free()
1317 return -ENOMEM; in snd_cs4281_create()
1319 spin_lock_init(&chip->reg_lock); in snd_cs4281_create()
1320 chip->card = card; in snd_cs4281_create()
1321 chip->pci = pci; in snd_cs4281_create()
1322 chip->irq = -1; in snd_cs4281_create()
1325 dev_err(card->dev, "invalid dual_codec option %d\n", dual_codec); in snd_cs4281_create()
1328 chip->dual_codec = dual_codec; in snd_cs4281_create()
1335 chip->ba0_addr = pci_resource_start(pci, 0); in snd_cs4281_create()
1336 chip->ba1_addr = pci_resource_start(pci, 1); in snd_cs4281_create()
1338 chip->ba0 = pci_ioremap_bar(pci, 0); in snd_cs4281_create()
1339 chip->ba1 = pci_ioremap_bar(pci, 1); in snd_cs4281_create()
1340 if (!chip->ba0 || !chip->ba1) { in snd_cs4281_create()
1342 return -ENOMEM; in snd_cs4281_create()
1345 if (request_irq(pci->irq, snd_cs4281_interrupt, IRQF_SHARED, in snd_cs4281_create()
1347 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq); in snd_cs4281_create()
1349 return -ENOMEM; in snd_cs4281_create()
1351 chip->irq = pci->irq; in snd_cs4281_create()
1352 card->sync_irq = chip->irq; in snd_cs4281_create()
1388 dev_err(chip->card->dev, in snd_cs4281_chip_init()
1390 return -EIO; in snd_cs4281_chip_init()
1395 * to 4281h. Allows vendor-defined configuration in snd_cs4281_chip_init()
1400 dev_err(chip->card->dev, in snd_cs4281_chip_init()
1402 return -EIO; in snd_cs4281_chip_init()
1405 dev_err(chip->card->dev, in snd_cs4281_chip_init()
1407 return -EIO; in snd_cs4281_chip_init()
1437 if (chip->dual_codec) in snd_cs4281_chip_init()
1444 (chip->dual_codec ? BA0_SERMC_TCID(chip->dual_codec) : BA0_SERMC_TCID(1)) | in snd_cs4281_chip_init()
1468 dev_err(chip->card->dev, "DLLRDY not seen\n"); in snd_cs4281_chip_init()
1469 return -EIO; in snd_cs4281_chip_init()
1494 dev_err(chip->card->dev, in snd_cs4281_chip_init()
1497 return -EIO; in snd_cs4281_chip_init()
1500 if (chip->dual_codec) { in snd_cs4281_chip_init()
1507 dev_info(chip->card->dev, in snd_cs4281_chip_init()
1509 chip->dual_codec = 0; in snd_cs4281_chip_init()
1522 * the codec is pumping ADC data across the AC-link. in snd_cs4281_chip_init()
1536 if (--retry_count > 0) in snd_cs4281_chip_init()
1538 dev_err(chip->card->dev, "never read ISV3 and ISV4 from AC'97\n"); in snd_cs4281_chip_init()
1539 return -EIO; in snd_cs4281_chip_init()
1553 struct cs4281_dma *dma = &chip->dma[tmp]; in snd_cs4281_chip_init()
1554 dma->regDBA = BA0_DBA0 + (tmp * 0x10); in snd_cs4281_chip_init()
1555 dma->regDCA = BA0_DCA0 + (tmp * 0x10); in snd_cs4281_chip_init()
1556 dma->regDBC = BA0_DBC0 + (tmp * 0x10); in snd_cs4281_chip_init()
1557 dma->regDCC = BA0_DCC0 + (tmp * 0x10); in snd_cs4281_chip_init()
1558 dma->regDMR = BA0_DMR0 + (tmp * 8); in snd_cs4281_chip_init()
1559 dma->regDCR = BA0_DCR0 + (tmp * 8); in snd_cs4281_chip_init()
1560 dma->regHDSR = BA0_HDSR0 + (tmp * 4); in snd_cs4281_chip_init()
1561 dma->regFCR = BA0_FCR0 + (tmp * 4); in snd_cs4281_chip_init()
1562 dma->regFSIC = BA0_FSIC0 + (tmp * 4); in snd_cs4281_chip_init()
1563 dma->fifo_offset = tmp * CS4281_FIFO_SIZE; in snd_cs4281_chip_init()
1564 snd_cs4281_pokeBA0(chip, dma->regFCR, in snd_cs4281_chip_init()
1568 BA0_FCR_OF(dma->fifo_offset)); in snd_cs4281_chip_init()
1571 chip->src_left_play_slot = 0; /* AC'97 left PCM playback (3) */ in snd_cs4281_chip_init()
1572 chip->src_right_play_slot = 1; /* AC'97 right PCM playback (4) */ in snd_cs4281_chip_init()
1573 chip->src_left_rec_slot = 10; /* AC'97 left PCM record (3) */ in snd_cs4281_chip_init()
1574 chip->src_right_rec_slot = 11; /* AC'97 right PCM record (4) */ in snd_cs4281_chip_init()
1577 chip->dma[0].valFCR = BA0_FCR_FEN | BA0_FCR_LS(0) | in snd_cs4281_chip_init()
1580 BA0_FCR_OF(chip->dma[0].fifo_offset); in snd_cs4281_chip_init()
1581 snd_cs4281_pokeBA0(chip, chip->dma[0].regFCR, chip->dma[0].valFCR); in snd_cs4281_chip_init()
1582 snd_cs4281_pokeBA0(chip, BA0_SRCSA, (chip->src_left_play_slot << 0) | in snd_cs4281_chip_init()
1583 (chip->src_right_play_slot << 8) | in snd_cs4281_chip_init()
1584 (chip->src_left_rec_slot << 16) | in snd_cs4281_chip_init()
1585 (chip->src_right_rec_slot << 24)); in snd_cs4281_chip_init()
1611 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr | BA0_MIDCR_MRST); in snd_cs4281_midi_reset()
1613 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_reset()
1618 struct cs4281 *chip = substream->rmidi->private_data; in snd_cs4281_midi_input_open()
1620 spin_lock_irq(&chip->reg_lock); in snd_cs4281_midi_input_open()
1621 chip->midcr |= BA0_MIDCR_RXE; in snd_cs4281_midi_input_open()
1622 chip->midi_input = substream; in snd_cs4281_midi_input_open()
1623 if (!(chip->uartm & CS4281_MODE_OUTPUT)) { in snd_cs4281_midi_input_open()
1626 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_input_open()
1628 spin_unlock_irq(&chip->reg_lock); in snd_cs4281_midi_input_open()
1634 struct cs4281 *chip = substream->rmidi->private_data; in snd_cs4281_midi_input_close()
1636 spin_lock_irq(&chip->reg_lock); in snd_cs4281_midi_input_close()
1637 chip->midcr &= ~(BA0_MIDCR_RXE | BA0_MIDCR_RIE); in snd_cs4281_midi_input_close()
1638 chip->midi_input = NULL; in snd_cs4281_midi_input_close()
1639 if (!(chip->uartm & CS4281_MODE_OUTPUT)) { in snd_cs4281_midi_input_close()
1642 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_input_close()
1644 chip->uartm &= ~CS4281_MODE_INPUT; in snd_cs4281_midi_input_close()
1645 spin_unlock_irq(&chip->reg_lock); in snd_cs4281_midi_input_close()
1651 struct cs4281 *chip = substream->rmidi->private_data; in snd_cs4281_midi_output_open()
1653 spin_lock_irq(&chip->reg_lock); in snd_cs4281_midi_output_open()
1654 chip->uartm |= CS4281_MODE_OUTPUT; in snd_cs4281_midi_output_open()
1655 chip->midcr |= BA0_MIDCR_TXE; in snd_cs4281_midi_output_open()
1656 chip->midi_output = substream; in snd_cs4281_midi_output_open()
1657 if (!(chip->uartm & CS4281_MODE_INPUT)) { in snd_cs4281_midi_output_open()
1660 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_output_open()
1662 spin_unlock_irq(&chip->reg_lock); in snd_cs4281_midi_output_open()
1668 struct cs4281 *chip = substream->rmidi->private_data; in snd_cs4281_midi_output_close()
1670 spin_lock_irq(&chip->reg_lock); in snd_cs4281_midi_output_close()
1671 chip->midcr &= ~(BA0_MIDCR_TXE | BA0_MIDCR_TIE); in snd_cs4281_midi_output_close()
1672 chip->midi_output = NULL; in snd_cs4281_midi_output_close()
1673 if (!(chip->uartm & CS4281_MODE_INPUT)) { in snd_cs4281_midi_output_close()
1676 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_output_close()
1678 chip->uartm &= ~CS4281_MODE_OUTPUT; in snd_cs4281_midi_output_close()
1679 spin_unlock_irq(&chip->reg_lock); in snd_cs4281_midi_output_close()
1686 struct cs4281 *chip = substream->rmidi->private_data; in snd_cs4281_midi_input_trigger()
1688 spin_lock_irqsave(&chip->reg_lock, flags); in snd_cs4281_midi_input_trigger()
1690 if ((chip->midcr & BA0_MIDCR_RIE) == 0) { in snd_cs4281_midi_input_trigger()
1691 chip->midcr |= BA0_MIDCR_RIE; in snd_cs4281_midi_input_trigger()
1692 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_input_trigger()
1695 if (chip->midcr & BA0_MIDCR_RIE) { in snd_cs4281_midi_input_trigger()
1696 chip->midcr &= ~BA0_MIDCR_RIE; in snd_cs4281_midi_input_trigger()
1697 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_input_trigger()
1700 spin_unlock_irqrestore(&chip->reg_lock, flags); in snd_cs4281_midi_input_trigger()
1706 struct cs4281 *chip = substream->rmidi->private_data; in snd_cs4281_midi_output_trigger()
1709 spin_lock_irqsave(&chip->reg_lock, flags); in snd_cs4281_midi_output_trigger()
1711 if ((chip->midcr & BA0_MIDCR_TIE) == 0) { in snd_cs4281_midi_output_trigger()
1712 chip->midcr |= BA0_MIDCR_TIE; in snd_cs4281_midi_output_trigger()
1714 while ((chip->midcr & BA0_MIDCR_TIE) && in snd_cs4281_midi_output_trigger()
1717 chip->midcr &= ~BA0_MIDCR_TIE; in snd_cs4281_midi_output_trigger()
1722 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_output_trigger()
1725 if (chip->midcr & BA0_MIDCR_TIE) { in snd_cs4281_midi_output_trigger()
1726 chip->midcr &= ~BA0_MIDCR_TIE; in snd_cs4281_midi_output_trigger()
1727 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_output_trigger()
1730 spin_unlock_irqrestore(&chip->reg_lock, flags); in snd_cs4281_midi_output_trigger()
1752 if ((err = snd_rawmidi_new(chip->card, "CS4281", device, 1, 1, &rmidi)) < 0) in snd_cs4281_midi()
1754 strcpy(rmidi->name, "CS4281"); in snd_cs4281_midi()
1757 …rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT | SNDRV_RAWMIDI_INFO_INPUT | SNDRV_RAWMIDI_INFO_DUP… in snd_cs4281_midi()
1758 rmidi->private_data = chip; in snd_cs4281_midi()
1759 chip->rmidi = rmidi; in snd_cs4281_midi()
1784 cdma = &chip->dma[dma]; in snd_cs4281_interrupt()
1785 spin_lock(&chip->reg_lock); in snd_cs4281_interrupt()
1787 val = snd_cs4281_peekBA0(chip, cdma->regHDSR); in snd_cs4281_interrupt()
1790 cdma->frag++; in snd_cs4281_interrupt()
1791 if ((val & BA0_HDSR_DHTC) && !(cdma->frag & 1)) { in snd_cs4281_interrupt()
1792 cdma->frag--; in snd_cs4281_interrupt()
1793 chip->spurious_dhtc_irq++; in snd_cs4281_interrupt()
1794 spin_unlock(&chip->reg_lock); in snd_cs4281_interrupt()
1797 if ((val & BA0_HDSR_DTC) && (cdma->frag & 1)) { in snd_cs4281_interrupt()
1798 cdma->frag--; in snd_cs4281_interrupt()
1799 chip->spurious_dtc_irq++; in snd_cs4281_interrupt()
1800 spin_unlock(&chip->reg_lock); in snd_cs4281_interrupt()
1803 spin_unlock(&chip->reg_lock); in snd_cs4281_interrupt()
1804 snd_pcm_period_elapsed(cdma->substream); in snd_cs4281_interrupt()
1808 if ((status & BA0_HISR_MIDI) && chip->rmidi) { in snd_cs4281_interrupt()
1811 spin_lock(&chip->reg_lock); in snd_cs4281_interrupt()
1814 if ((chip->midcr & BA0_MIDCR_RIE) == 0) in snd_cs4281_interrupt()
1816 snd_rawmidi_receive(chip->midi_input, &c, 1); in snd_cs4281_interrupt()
1819 if ((chip->midcr & BA0_MIDCR_TIE) == 0) in snd_cs4281_interrupt()
1821 if (snd_rawmidi_transmit(chip->midi_output, &c, 1) != 1) { in snd_cs4281_interrupt()
1822 chip->midcr &= ~BA0_MIDCR_TIE; in snd_cs4281_interrupt()
1823 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_interrupt()
1828 spin_unlock(&chip->reg_lock); in snd_cs4281_interrupt()
1845 struct cs4281 *chip = opl3->private_data; in snd_cs4281_opl3_command()
1849 port = chip->ba0 + BA0_B1AP; /* right port */ in snd_cs4281_opl3_command()
1851 port = chip->ba0 + BA0_B0AP; /* left port */ in snd_cs4281_opl3_command()
1853 spin_lock_irqsave(&opl3->reg_lock, flags); in snd_cs4281_opl3_command()
1861 spin_unlock_irqrestore(&opl3->reg_lock, flags); in snd_cs4281_opl3_command()
1874 return -ENODEV; in snd_cs4281_probe()
1877 return -ENOENT; in snd_cs4281_probe()
1880 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE, in snd_cs4281_probe()
1889 card->private_data = chip; in snd_cs4281_probe()
1907 opl3->private_data = chip; in snd_cs4281_probe()
1908 opl3->command = snd_cs4281_opl3_command; in snd_cs4281_probe()
1915 strcpy(card->driver, "CS4281"); in snd_cs4281_probe()
1916 strcpy(card->shortname, "Cirrus Logic CS4281"); in snd_cs4281_probe()
1917 sprintf(card->longname, "%s at 0x%lx, irq %d", in snd_cs4281_probe()
1918 card->shortname, in snd_cs4281_probe()
1919 chip->ba0_addr, in snd_cs4281_probe()
1920 chip->irq); in snd_cs4281_probe()
1963 struct cs4281 *chip = card->private_data; in cs4281_suspend()
1968 snd_ac97_suspend(chip->ac97); in cs4281_suspend()
1969 snd_ac97_suspend(chip->ac97_secondary); in cs4281_suspend()
1981 chip->suspend_regs[i] = snd_cs4281_peekBA0(chip, saved_regs[i]); in cs4281_suspend()
1986 /* Power off FM, Joystick, AC link, */ in cs4281_suspend()
2004 struct cs4281 *chip = card->private_data; in cs4281_resume()
2017 snd_cs4281_pokeBA0(chip, saved_regs[i], chip->suspend_regs[i]); in cs4281_resume()
2019 snd_ac97_resume(chip->ac97); in cs4281_resume()
2020 snd_ac97_resume(chip->ac97_secondary); in cs4281_resume()