firewire/dice/dice-interface.h

12  * Writes are not allowed except where noted; quadlet-sized registers must be
15  * All values are in big endian.  The DICE firmware runs on a little-endian CPU
21  * Streaming is handled by the "DICE driver" interface.  Its registers are
27  * The registers are organized in several sections, which are organized
31  * The section offset values are relative to DICE_PRIVATE_SPACE; the offset/
32  * size values are measured in quadlets.  Read-only.
61  * the bits of previous events are cleared, and the value of this register is
78  * bytes.  Quadlets are byte-swapped.  The encoding is whatever the host driver
88  * register can be changed even while streams are running.
216  * Names of all clock sources; read-only.  Quadlets are byte-swapped.  Names
217  * are separated with one backslash, the list is terminated with two
218  * backslashes.  Unused clock sources are included.
236  * of the following streams are offset by this register's value.
241  * The isochronous channel number on which packets are sent, or -1 if the
259  * The speed at which the packets are sent, SCODE_100-_400; read/write.
265  * Names of all audio channels; read-only.  Quadlets are byte-swapped.  Names
266  * are separated with one backslash, the list is terminated with two
298  * of the following streams are offset by this register's value.
303  * The isochronous channel number on which packets are received, or -1 if the
328  * Names of all audio channels; read-only.  Quadlets are byte-swapped.  Names
329  * are separated with one backslash, the list is terminated with two
375 /* The data bits are not available. */