include/sound/cs4231-regs.h

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
27 #define CS4231_LEFT_OUTPUT	0x06	/* left output control register */
28 #define CS4231_RIGHT_OUTPUT	0x07	/* right output control register */
29 #define CS4231_PLAYBK_FORMAT	0x08	/* clock and data format - playback - bits 7-0 MCE */
30 #define CS4231_IFACE_CTRL	0x09	/* interface control - bits 7-2 MCE */
37 #define CS4231_ALT_FEATURE_1	0x10	/* alternate #1 feature enable */
39 #define CS4231_ALT_FEATURE_2	0x11	/* alternate #2 feature enable */
51 #define CS4231_LINE_LEFT_OUTPUT	0x19	/* left line output control register (InterWave only) */
52 #define CS4231_VERSION		0x19	/* CS4231(A) - version values */
53 #define CS4231_MONO_CTRL	0x1a	/* mono input/output control */
54 #define CS4231_LINE_RIGHT_OUTPUT 0x1b	/* right line output control register (InterWave only) */
56 #define CS4235_LEFT_MASTER	0x1b	/* left master output control */
57 #define CS4231_REC_FORMAT	0x1c	/* clock and data format - record - bits 7-0 MCE */
59 #define CS4235_RIGHT_MASTER	0x1d	/* right master output control */
63 /* definitions for codec register select port - CODECP( REGSEL ) */
66 #define CS4231_MCE		0x40	/* mode change enable */
69 /* definitions for codec status register - CODECP( STATUS ) */
93 /* definitions for clock and data format register - CS4231_PLAYBK_FORMAT */
95 #define CS4231_LINEAR_8		0x00	/* 8-bit unsigned data */
96 #define CS4231_ALAW_8		0x60	/* 8-bit A-law companded */
97 #define CS4231_ULAW_8		0x20	/* 8-bit U-law companded */
98 #define CS4231_LINEAR_16	0x40	/* 16-bit twos complement data - little endian */
99 #define CS4231_LINEAR_16_BIG	0xc0	/* 16-bit twos complement data - big endian */
100 #define CS4231_ADPCM_16		0xa0	/* 16-bit ADPCM */
102 /* bits 3-1 define frequency divisor */
106 /* definitions for interface control register - CS4231_IFACE_CTRL */
108 #define CS4231_RECORD_PIO	0x80	/* record PIO enable */
109 #define CS4231_PLAYBACK_PIO	0x40	/* playback PIO enable */
113 #define CS4231_RECORD_ENABLE	0x02	/* record enable */
114 #define CS4231_PLAYBACK_ENABLE	0x01	/* playback enable */
116 /* definitions for pin control register - CS4231_PIN_CTRL */
118 #define CS4231_IRQ_ENABLE	0x02	/* enable IRQ */
122 /* definitions for test and init register - CS4231_TEST_INIT */
127 /* definitions for misc control register - CS4231_MISC_INFO */
130 #define CS4231_IW_MODE3		0x6c	/* MODE 3 - InterWave enhanced mode */
131 #define CS4231_4236_MODE3	0xe0	/* MODE 3 - CS4236+ enhanced mode */
133 /* definitions for alternate feature 1 register - CS4231_ALT_FEATURE_1 */
136 #define CS4231_TIMER_ENABLE	0x40	/* codec timer enable */
137 #define CS4231_OLB		0x80	/* output level bit */
139 /* definitions for Extended Registers - CS4236+ */
155 #define CS4236_DAC_MUTE		0xb8	/* DAC mute and IFSE enable */
164 /* definitions for extended registers - OPTI93X */