Lines Matching +full:stop +full:- +full:mode
1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2 /* Copyright(c) 2015-17 Intel Corporation. */
71 * enum sdw_slave_status - Slave status
85 * enum sdw_clk_stop_type: clock stop operations
87 * @SDW_CLK_PRE_PREPARE: pre clock stop prepare
88 * @SDW_CLK_POST_PREPARE: post clock stop prepare
89 * @SDW_CLK_PRE_DEPREPARE: pre clock stop de-prepare
90 * @SDW_CLK_POST_DEPREPARE: post clock stop de-prepare
100 * enum sdw_command_response - Command response as defined by SDW spec
153 * enum sdw_port_data_mode: Data Port mode
155 * @SDW_PORT_DATA_MODE_NORMAL: Normal data mode where audio data is received
157 * @SDW_PORT_DATA_MODE_PRBS: Test mode which uses a PRBS generator to produce
159 * @SDW_PORT_DATA_MODE_STATIC_0: Simple test mode which uses static value of
161 * @SDW_PORT_DATA_MODE_STATIC_1: Simple test mode which uses static value of
180 * enum sdw_p15_behave - Slave Port 15 behaviour when the Master attempts a
191 * enum sdw_dpn_type - Data port types
206 * enum sdw_clk_stop_mode - Clock Stop modes
209 * @SDW_CLK_STOP_MODE1: Slave may have entered a deeper power-saving mode,
218 * struct sdw_dp0_prop - DP0 properties
229 * implementation-defined interrupts
246 * struct sdw_dpn_audio_mode - Audio mode properties for DPn
259 * changed to a frequency supported by this mode or compatible modes
262 * Audio Mode to other Audio Modes
278 * struct sdw_dpn_prop - Data Port DPn properties
291 * @ch_prep_timeout: Port-specific timeout value, in milliseconds
293 * implementation-defined interrupts
300 * @modes: SDW mode supported
303 * @block_pack_mode: Type of block port mode supported
334 * struct sdw_slave_prop - SoundWire Slave properties
336 * @wake_capable: Wake-up events are supported
337 * @test_mode_capable: If test mode is supported
338 * @clk_stop_mode1: Clock-Stop Mode 1 is supported
339 * @simple_clk_stop_capable: Simple clock mode is supported
340 * @clk_stop_timeout: Worst-case latency of the Clock Stop Prepare State
342 * @ch_prep_timeout: Worst-case latency of the Channel Prepare State Machine
345 * state machine (P=1 SCSP_SM) after exit from clock-stop mode1
390 * struct sdw_master_prop - Master properties
392 * @clk_stop_modes: Bitmap, bit N set when clock-stop-modeN supported
405 * @hw_disabled: if true, the Master is not functional, typically due to pin-mux
434 * struct sdw_slave_id - Slave ID
452 * Helper macros to extract the MIPI-defined IDs
481 * struct sdw_slave_intr_status - Slave interrupt status
491 * sdw_reg_bank - SoundWire register banks
516 * struct sdw_prepare_ch: Prepare/De-prepare Data Port channel
520 * @prepare: Prepare (true) /de-prepare (false) channel
557 * @s_data_mode: NORMAL, STATIC or PRBS mode for all Slave ports
558 * @m_data_mode: NORMAL, STATIC or PRBS mode for all Master ports. The value
597 enum sdw_clk_stop_mode mode,
603 * struct sdw_slave - SoundWire Slave
614 * @dev_num_sticky: one-time static Device Number assigned by Bus
618 * Slave state changes/implementation-defined interrupts
624 * @unattach_request: mask field to keep track why the Slave re-attached and
625 * was re-initialized. This is useful to deal with potential race conditions
658 * struct sdw_master_device - SoundWire 'Master Device' representation
704 * @flow_mode: Port Data flow mode
705 * @data_mode: Test modes or normal mode
727 * @hstop: Horizontal stop of the payload data
789 * struct sdw_defer - SDW deffered message
801 * struct sdw_master_ops - Master driver ops
828 * struct sdw_bus - SoundWire bus
829 * @dev: Shortcut to &bus->md->dev to avoid changing the entire code.
832 * @id: bus system-wide unique id
848 * @clk_stop_timeout: Clock stop timeout computed
854 * hardware-based synchronization is required. This value is only
855 * meaningful if multi_link is set. If set to 1, hardware-based
924 * @SDW_STREAM_DEPREPARED: Stream de-prepared