Lines Matching +full:bank +full:- +full:number

1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2 /* Copyright(c) 2015-17 Intel Corporation. */
15 /* SDW Broadcast Device Number */
18 /* SDW Enumeration Device Number */
25 /* SDW Master Device Number, not supported yet */
71 * enum sdw_slave_status - Slave status
89 * @SDW_CLK_PRE_DEPREPARE: pre clock stop de-prepare
90 * @SDW_CLK_POST_DEPREPARE: post clock stop de-prepare
100 * enum sdw_command_response - Command response as defined by SDW spec
180 * enum sdw_p15_behave - Slave Port 15 behaviour when the Master attempts a
191 * enum sdw_dpn_type - Data port types
206 * enum sdw_clk_stop_mode - Clock Stop modes
209 * @SDW_CLK_STOP_MODE1: Slave may have entered a deeper power-saving mode,
218 * struct sdw_dp0_prop - DP0 properties
219 * @max_word: Maximum number of bits in a Payload Channel Sample, 1 to 64
221 * @min_word: Minimum number of bits in a Payload Channel Sample, 1 to 64
223 * @num_words: number of wordlengths supported
229 * implementation-defined interrupts
231 * The wordlengths are specified by Spec as max, min AND number of
246 * struct sdw_dpn_audio_mode - Audio mode properties for DPn
249 * @bus_num_freq: Number of discrete frequencies supported
253 * @num_freq: Number of discrete sampling frequency supported
278 * struct sdw_dpn_prop - Data Port DPn properties
279 * @num: port number
280 * @max_word: Maximum number of bits in a Payload Channel Sample, 1 to 64
282 * @min_word: Minimum number of bits in a Payload Channel Sample, 1 to 64
284 * @num_words: Number of discrete supported wordlengths
287 * @max_grouping: Maximum number of samples that can be grouped together for
291 * @ch_prep_timeout: Port-specific timeout value, in milliseconds
293 * implementation-defined interrupts
296 * @num_channels: Number of discrete channels supported
298 * @num_ch_combinations: Number of channel combinations supported
301 * @max_async_buffer: Number of samples that this port can buffer in
334 * struct sdw_slave_prop - SoundWire Slave properties
336 * @wake_capable: Wake-up events are supported
338 * @clk_stop_mode1: Clock-Stop Mode 1 is supported
340 * @clk_stop_timeout: Worst-case latency of the Clock Stop Prepare State
342 * @ch_prep_timeout: Worst-case latency of the Channel Prepare State Machine
345 * state machine (P=1 SCSP_SM) after exit from clock-stop mode1
349 * @bank_delay_support: Slave implements bank delay/bridge support registers
354 * @master_count: Number of Masters present on this Slave
390 * struct sdw_master_prop - Master properties
392 * @clk_stop_modes: Bitmap, bit N set when clock-stop-modeN supported
394 * @num_clk_gears: Number of clock gears supported
396 * @num_clk_freq: Number of clock frequencies supported, in Hz
399 * @default_row: Number of rows
400 * @default_col: Number of columns
402 * @err_threshold: Number of times that software may retry sending a single
405 * @hw_disabled: if true, the Master is not functional, typically due to pin-mux
434 * struct sdw_slave_id - Slave ID
452 * Helper macros to extract the MIPI-defined IDs
481 * struct sdw_slave_intr_status - Slave interrupt status
491 * sdw_reg_bank - SoundWire register banks
492 * @SDW_BANK0: Soundwire register bank 0
493 * @SDW_BANK1: Soundwire register bank 1
504 * @num_rows: Number of rows in frame
505 * @num_cols: Number of columns in frame
506 * @bank: Next register bank
512 unsigned int bank; member
516 * struct sdw_prepare_ch: Prepare/De-prepare Data Port channel
518 * @num: Port number
520 * @prepare: Prepare (true) /de-prepare (false) channel
521 * @bank: Register bank, which bank Slave/Master driver should program for
530 unsigned int bank; member
549 * @curr_bank: Current bank in use (BANK0/BANK1)
550 * @next_bank: Next bank to use (BANK0/BANK1). next_bank will always be
603 * struct sdw_slave - SoundWire Slave
613 * @dev_num: Current Device Number, values can be 0 or dev_num_sticky
614 * @dev_num_sticky: one-time static Device Number assigned by Bus
618 * Slave state changes/implementation-defined interrupts
624 * @unattach_request: mask field to keep track why the Slave re-attached and
625 * was re-initialized. This is useful to deal with potential race conditions
658 * struct sdw_master_device - SoundWire 'Master Device' representation
702 * @num: Port number
721 * @num: Port number
734 * during a bank switch without any artifacts in audio stream.
752 * @num: Port number
776 unsigned int bank);
779 enum sdw_reg_bank bank);
783 struct sdw_enable_ch *enable_ch, unsigned int bank);
789 * struct sdw_defer - SDW deffered message
801 * struct sdw_master_ops - Master driver ops
807 * @pre_bank_switch: Callback for pre bank switch
808 * @post_bank_switch: Callback for post bank switch
828 * struct sdw_bus - SoundWire bus
829 * @dev: Shortcut to &bus->md->dev to avoid changing the entire code.
831 * @link_id: Link id number, can be 0 to N, unique for each Master
832 * @id: bus system-wide unique id
835 * Bit set implies used number, bit clear implies unused number.
849 * @bank_switch_timeout: Bank switch timeout computed
853 * @hw_sync_min_links: Number of links used by a stream above which
854 * hardware-based synchronization is required. This value is only
855 * meaningful if multi_link is set. If set to 1, hardware-based
891 * @num: Port number
904 * @bps: Number of bits per audio sample
924 * @SDW_STREAM_DEPREPARED: Stream de-prepared
941 * @ch_count: Number of channels