Lines Matching +full:protect +full:- +full:exec

1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright © 2000-2010 David Woodhouse <dwmw2@infradead.org>
73 #define NAND_CMD_NONE -1
82 #define NAND_DATA_IFACE_CHECK_ONLY -1
96 * ecc.correct() returns -EBADMSG.
122 * Chip requires ready check on read (for auto-incremented sequential read).
140 #define NAND_HAS_SUBPAGE_READ(chip) ((chip->options & NAND_SUBPAGE_READ))
166 * This option could be defined by controller drivers to protect against
172 * In case your controller is implementing ->legacy.cmd_ctrl() and is relying
173 * on the default ->cmdfunc() implementation, you may want to let the core
223 * struct nand_parameters - NAND generic parameters from the parameter page
245 * struct nand_id - NAND id structure
255 * struct nand_ecc_step_info - ECC step information of ECC engine
267 * struct nand_ecc_caps - capability of ECC engine
293 * struct nand_ecc_ctrl - Control structure for ECC
313 * corrected bitflips, -EBADMSG if the number of bitflips exceed
316 * If -EBADMSG is returned the input buffers should be left
320 * controller and always return contiguous in-band and
321 * out-of-band data even if they're not stored
323 * NAND_ECC_PLACEMENT_INTERLEAVED interleaves in-band and
324 * out-of-band data).
328 * in-band and out-of-band data. ECC controller is
331 * NAND_ECC_PLACEMENT_INTERLEAVED interleaves in-band and
332 * out-of-band data).
335 * any single ECC step, -EIO hw error
386 * struct nand_sdr_timings - SDR NAND chip timings
407 * @tCHZ_max: CE# high to output hi-Z
416 * @tIR_min: Output hi-Z to RE# low
423 * @tRHZ_max: RE# high to output hi-Z
478 * enum nand_interface_type - NAND interface type
486 * struct nand_interface_config - NAND interface timing
503 * nand_get_sdr_timings - get SDR timing from data interface
509 if (conf->type != NAND_SDR_IFACE) in nand_get_sdr_timings()
510 return ERR_PTR(-EINVAL); in nand_get_sdr_timings()
512 return &conf->timings.sdr; in nand_get_sdr_timings()
516 * struct nand_op_cmd_instr - Definition of a command instruction
524 * struct nand_op_addr_instr - Definition of an address instruction
534 * struct nand_op_data_instr - Definition of a data instruction
539 * @force_8bit: force 8-bit access
555 * struct nand_op_waitrdy_instr - Definition of a wait ready instruction
563 * enum nand_op_instr_type - Definition of all instruction types
579 * struct nand_op_instr - Instruction object
694 * struct nand_subop - a sub operation
695 * @cs: the CS line to select for this NAND sub-operation
699 * of the sub-operation
701 * of the sub-operation
707 * be split by the parser into sub-operations which will be passed to the
728 * struct nand_op_parser_addr_constraints - Constraints for address instructions
737 * struct nand_op_parser_data_constraints - Constraints for data instructions
745 * struct nand_op_parser_pattern_elem - One element of a pattern
795 * struct nand_op_parser_pattern - NAND sub-operation pattern descriptor
798 * @exec: the function that will issue a sub-operation
804 * operation (or a sub-set of a NAND operation) is found, the pattern ->exec()
815 int (*exec)(struct nand_chip *chip, const struct nand_subop *subop); member
820 .exec = _exec, \
827 * struct nand_op_parser - NAND controller operation parser descriptor
853 * struct nand_operation - NAND operation descriptor
858 * The actual operation structure that will be passed to chip->exec_op().
881 switch (instr->type) { in nand_op_trace()
884 instr->ctx.cmd.opcode); in nand_op_trace()
888 instr->ctx.addr.naddrs, in nand_op_trace()
889 instr->ctx.addr.naddrs < 64 ? in nand_op_trace()
890 instr->ctx.addr.naddrs : 64, in nand_op_trace()
891 instr->ctx.addr.addrs); in nand_op_trace()
895 instr->ctx.data.len, in nand_op_trace()
896 instr->ctx.data.force_8bit ? in nand_op_trace()
897 ", force 8-bit" : ""); in nand_op_trace()
901 instr->ctx.data.len, in nand_op_trace()
902 instr->ctx.data.force_8bit ? in nand_op_trace()
903 ", force 8-bit" : ""); in nand_op_trace()
907 instr->ctx.waitrdy.timeout_ms); in nand_op_trace()
914 * struct nand_controller_ops - Controller operations
924 * nand_controller_ops->attach_chip().
927 * This method replaces chip->legacy.cmdfunc(),
928 * chip->legacy.{read,write}_{buf,byte,word}(),
929 * chip->legacy.dev_ready() and chip->legacy.waifunc().
946 * struct nand_controller - Structure used to describe a NAND controller
958 mutex_init(&nfc->lock); in nand_controller_init()
962 * struct nand_legacy - NAND chip legacy fields/hooks
1013 * struct nand_chip_ops - NAND chip operations
1018 * @setup_read_retry: Set the read-retry mode (mostly needed for MLC NANDs)
1032 * struct nand_manufacturer - NAND manufacturer structure
1042 * struct nand_chip - NAND Private Flash Chip Data
1074 * @pagemask: Page number mask = number of (pages / chip) - 1
1080 * @pagecache.page: Page number currently in the cache. -1 means no page is
1086 * @cur_cs: Currently selected target. -1 means no target selected, otherwise we
1154 return &chip->base.mtd; in nand_to_mtd()
1159 return chip->priv; in nand_get_controller_data()
1164 chip->priv = priv; in nand_set_controller_data()
1170 chip->manufacturer.priv = priv; in nand_set_manufacturer_data()
1175 return chip->manufacturer.priv; in nand_get_manufacturer_data()
1190 * nand_get_interface_config - Retrieve the current interface configuration
1197 return chip->current_interface_config; in nand_get_interface_config()
1225 #define NAND_ECC_STRENGTH(type) ((type)->ecc.strength_ds)
1226 #define NAND_ECC_STEP(type) ((type)->ecc.step_ds)
1229 * struct nand_flash_dev - NAND Flash Device ID Structure
1230 * @name: a human-readable name of the NAND chip
1283 WARN(nanddev_bits_per_cell(&chip->base) == 0, in nand_is_slc()
1284 "chip->bits_per_cell is used uninitialized\n"); in nand_is_slc()
1285 return nanddev_bits_per_cell(&chip->base) == 1; in nand_is_slc()
1403 * nand_get_data_buf() - Get the internal page buffer
1406 * Returns the pre-allocated page buffer after invalidating the cache. This
1418 chip->pagecache.page = -1; in nand_get_data_buf()
1420 return chip->data_buf; in nand_get_data_buf()