1189 #define MLX5_CAP_GEN(mdev, cap) \  argument
1192 #define MLX5_CAP_GEN_64(mdev, cap) \  argument
1195 #define MLX5_CAP_GEN_MAX(mdev, cap) \  argument
1198 #define MLX5_CAP_ETH(mdev, cap) \  argument
1202 #define MLX5_CAP_ETH_MAX(mdev, cap) \  argument
1206 #define MLX5_CAP_IPOIB_ENHANCED(mdev, cap) \  argument
1210 #define MLX5_CAP_ROCE(mdev, cap) \  argument
1213 #define MLX5_CAP_ROCE_MAX(mdev, cap) \  argument
1216 #define MLX5_CAP_ATOMIC(mdev, cap) \  argument
1219 #define MLX5_CAP_ATOMIC_MAX(mdev, cap) \  argument
1222 #define MLX5_CAP_FLOWTABLE(mdev, cap) \  argument
1225 #define MLX5_CAP64_FLOWTABLE(mdev, cap) \  argument
1228 #define MLX5_CAP_FLOWTABLE_MAX(mdev, cap) \  argument
1231 #define MLX5_CAP_FLOWTABLE_NIC_RX(mdev, cap) \  argument
1234 #define MLX5_CAP_FLOWTABLE_NIC_RX_MAX(mdev, cap) \  argument
1237 #define MLX5_CAP_FLOWTABLE_NIC_TX(mdev, cap) \  argument
1240 #define MLX5_CAP_FLOWTABLE_NIC_TX_MAX(mdev, cap) \  argument
1243 #define MLX5_CAP_FLOWTABLE_SNIFFER_RX(mdev, cap) \  argument
1246 #define MLX5_CAP_FLOWTABLE_SNIFFER_RX_MAX(mdev, cap) \  argument
1249 #define MLX5_CAP_FLOWTABLE_SNIFFER_TX(mdev, cap) \  argument
1252 #define MLX5_CAP_FLOWTABLE_SNIFFER_TX_MAX(mdev, cap) \  argument
1255 #define MLX5_CAP_FLOWTABLE_RDMA_RX(mdev, cap) \  argument
1258 #define MLX5_CAP_FLOWTABLE_RDMA_RX_MAX(mdev, cap) \  argument
1261 #define MLX5_CAP_FLOWTABLE_RDMA_TX(mdev, cap) \  argument
1264 #define MLX5_CAP_FLOWTABLE_RDMA_TX_MAX(mdev, cap) \  argument
1267 #define MLX5_CAP_ESW_FLOWTABLE(mdev, cap) \  argument
1271 #define MLX5_CAP_ESW_FLOWTABLE_MAX(mdev, cap) \  argument
1275 #define MLX5_CAP_ESW_FLOWTABLE_FDB(mdev, cap) \  argument
1278 #define MLX5_CAP_ESW_FLOWTABLE_FDB_MAX(mdev, cap) \  argument
1281 #define MLX5_CAP_ESW_EGRESS_ACL(mdev, cap) \  argument
1284 #define MLX5_CAP_ESW_EGRESS_ACL_MAX(mdev, cap) \  argument
1287 #define MLX5_CAP_ESW_INGRESS_ACL(mdev, cap) \  argument
1290 #define MLX5_CAP_ESW_INGRESS_ACL_MAX(mdev, cap) \  argument
1293 #define MLX5_CAP_ESW(mdev, cap) \  argument
1297 #define MLX5_CAP64_ESW_FLOWTABLE(mdev, cap) \  argument
1301 #define MLX5_CAP_ESW_MAX(mdev, cap) \  argument
1305 #define MLX5_CAP_ODP(mdev, cap)\  argument
1308 #define MLX5_CAP_ODP_MAX(mdev, cap)\  argument
1311 #define MLX5_CAP_VECTOR_CALC(mdev, cap) \  argument
1315 #define MLX5_CAP_QOS(mdev, cap)\  argument
1318 #define MLX5_CAP_DEBUG(mdev, cap)\  argument
1348 #define MLX5_CAP_FPGA(mdev, cap) \  argument
1351 #define MLX5_CAP64_FPGA(mdev, cap) \  argument
1354 #define MLX5_CAP_DEV_MEM(mdev, cap)\  argument
1357 #define MLX5_CAP64_DEV_MEM(mdev, cap)\  argument
1360 #define MLX5_CAP_TLS(mdev, cap) \  argument
1363 #define MLX5_CAP_DEV_EVENT(mdev, cap)\  argument
1366 #define MLX5_CAP_DEV_VDPA_EMULATION(mdev, cap)\  argument
1370 #define MLX5_CAP64_DEV_VDPA_EMULATION(mdev, cap)\  argument
1374 #define MLX5_CAP_IPSEC(mdev, cap)\  argument