Lines Matching +full:irq +full:- +full:gpios

1 /* SPDX-License-Identifier: GPL-2.0 */
7 #include <linux/irq.h>
12 #include <linux/pinctrl/pinconf-generic.h>
29 * struct gpio_irq_chip - GPIO interrupt controller
35 * GPIO IRQ chip implementation, provided by GPIO driver.
43 * hwirq number and Linux IRQ number.
50 * Table of interrupt domain operations for this IRQ chip.
66 * If non-NULL, will be set as the parent of this GPIO interrupt
67 * controller's IRQ domain to establish a hierarchical interrupt
76 * This callback translates a child hardware IRQ offset to a parent
77 * hardware IRQ offset on a hierarchical interrupt chip. The child
78 * hardware IRQs correspond to the GPIO index 0..ngpio-1 (see the
80 * hardware IRQ and type (such as IRQ_TYPE_*) shall be returned by
86 * HWIRQ, return -EINVAL, but also make sure to fill in @valid_mask and
100 * for the parent's IRQ domain. If this is not specified, then
101 * &gpiochip_populate_parent_fwspec_twocell will be used. A four-cell
113 * offset on the GPIO chip to an IRQ number for the GPIO to_irq()
123 * The IRQ domain operations that will be used for this GPIO IRQ
125 * be populated to setup the IRQ hierarchy. Some drivers need to
134 * The IRQ handler to use (often a predefined IRQ core function) for
142 * Default IRQ triggering type applied during GPIO driver
150 * Per GPIO IRQ chip lockdep class for IRQ lock.
157 * Per GPIO IRQ chip lockdep class for IRQ request.
208 * an IRQ chip will be added. This is quite useful when
209 * a particular driver wants to clear IRQ related registers
219 * bits from 0..(ngpios-1) set to "1" as in valid. The callback can
230 * If not %NULL holds bitmask of GPIOs which are valid to be included
231 * in IRQ domain of the chip.
238 * Required for static IRQ allocation. If set, irq_domain_add_simple()
272 * struct gpio_chip - abstract a GPIO controller
274 * number or the name of the SoC IP-block implementing it.
276 * @parent: optional parent device providing the GPIOs
277 * @owner: helps prevent removal of modules exporting active GPIOs
278 * @request: optional hook for chip-specific activation, such as
280 * @free: optional hook for chip-specific deactivation, such as
285 * function, even on input-only or output-only gpio chips.
287 * This can be omitted on input-only or output-only gpio chips.
289 * This can be omitted on input-only or output-only gpio chips.
297 * @to_irq: optional hook supporting non-static gpio_to_irq() mappings;
303 * not all GPIOs are valid.
306 * It is called after adding GPIO chip and before adding IRQ chip.
309 * DEPRECATION: providing anything non-negative and nailing the base
310 * offset of GPIO chips is deprecated. Please pass -1 as base to
313 * @ngpio: the number of GPIOs handled by this controller; the last GPIO
314 * handled is (base + ngpio - 1).
316 * names for the GPIOs in this chip. Any entry in the array
324 * as the chip access may sleep when e.g. reading out the IRQ status
340 * @bgpio_lock: used to lock chip->bgpio_data. Also, this is needed to keep
348 * A gpio_chip can help platforms abstract various sources of GPIOs so
354 * by "offset" values in the range 0..(@ngpio - 1). When those signals
427 * @irq:
432 struct gpio_irq_chip irq; member
438 * If not %NULL holds bitmask of GPIOs which are valid to be used
466 * Callback to translate a device tree GPIO specifier into a chip-
478 * for_each_requested_gpio_in_range - iterates over requested GPIOs in a given range
482 * @size: amount of GPIOs to check starting from @base
491 for_each_requested_gpio_in_range(chip, i, 0, chip->ngpio, label)
499 * gpiochip_add_data() - register a gpio_chip
500 * @gc: the chip to register, with gc->base initialized
501 * @data: driver-private data associated with this chip
505 * When gpiochip_add_data() is called very early during boot, so that GPIOs
506 * can be freely used, the gc->parent device must be registered before
508 * for GPIOs will fail rudely.
513 * If gc->base is negative, this requests dynamic assignment of
514 * a range of valid GPIOs.
518 * gc->base is invalid or already associated with a different chip.
615 int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
617 void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq);
707 * struct gpio_pin_range - pin range controlled by a gpio chip
761 /* lock/unlock as IRQ */
774 return ERR_PTR(-ENODEV); in gpiod_to_chip()
781 return -EINVAL; in gpiochip_lock_as_irq()