linux/gpio/driver.h

1 /* SPDX-License-Identifier: GPL-2.0 */
12 #include <linux/pinctrl/pinconf-generic.h>
29  * struct gpio_irq_chip - GPIO interrupt controller
35 	 * GPIO IRQ chip implementation, provided by GPIO driver.
42 	 * Interrupt translation domain; responsible for mapping between GPIO
66 	 * If non-NULL, will be set as the parent of this GPIO interrupt
67 	 * controller's IRQ domain to establish a hierarchical interrupt
76 	 * This callback translates a child hardware IRQ offset to a parent
77 	 * hardware IRQ offset on a hierarchical interrupt chip. The child
78 	 * hardware IRQs correspond to the GPIO index 0..ngpio-1 (see the
82 	 * a lookup table or whatever method is best for this chip. Return
85 	 * If some ranges of hardware IRQs do not have a corresponding parent
86 	 * HWIRQ, return -EINVAL, but also make sure to fill in @valid_mask and
87 	 * @need_valid_mask to make these GPIO lines unavailable for
101 	 * &gpiochip_populate_parent_fwspec_twocell will be used. A four-cell
112 	 * This optional callback is used to translate the child's GPIO line
113 	 * offset on the GPIO chip to an IRQ number for the GPIO to_irq()
114 	 * callback. If this is not specified, then a default callback will be
123 	 * The IRQ domain operations that will be used for this GPIO IRQ
134 	 * The IRQ handler to use (often a predefined IRQ core function) for
135 	 * GPIO IRQs, provided by GPIO driver.
142 	 * Default IRQ triggering type applied during GPIO driver
143 	 * initialization, provided by GPIO driver.
150 	 * Per GPIO IRQ chip lockdep class for IRQ lock.
157 	 * Per GPIO IRQ chip lockdep class for IRQ request.
164 	 * The interrupt handler for the GPIO chip's parent interrupts, may be
180 	 * The number of interrupt parents of a GPIO chip.
187 	 * A list of interrupt parents of a GPIO chip. This is owned by the
195 	 * A list of interrupt parents for each line of a GPIO chip.
209 	 * a particular driver wants to clear IRQ related registers
216 	 * used if not all GPIO lines are valid interrupts. Sometimes some
218 	 * is passed a bitmap in "valid_mask" and it will have ngpios
219 	 * bits from 0..(ngpios-1) set to "1" as in valid. The callback can
272  * struct gpio_chip - abstract a GPIO controller
273  * @label: a functional name for the GPIO device, such as a part
274  *	number or the name of the SoC IP-block implementing it.
278  * @request: optional hook for chip-specific activation, such as
280  * @free: optional hook for chip-specific deactivation, such as
285  *	function, even on input-only or output-only gpio chips.
287  *	This can be omitted on input-only or output-only gpio chips.
289  *	This can be omitted on input-only or output-only gpio chips.
297  * @to_irq: optional hook supporting non-static gpio_to_irq() mappings;
305  *	requires special mapping of the pins that provides GPIO functionality.
306  *	It is called after adding GPIO chip and before adding IRQ chip.
307  * @base: identifies the first GPIO number handled by this chip;
309  *	DEPRECATION: providing anything non-negative and nailing the base
310  *	offset of GPIO chips is deprecated. Please pass -1 as base to
312  *	get rid of the static GPIO number space in the long run.
313  * @ngpio: the number of GPIOs handled by this controller; the last GPIO
314  *	handled is (base + ngpio - 1).
317  *      may be NULL if there is no alias for the GPIO, however the
318  *      array must be @ngpio entries long.  A name can include a single printk
320  *      number of the gpio.
322  *	must while accessing GPIO expander chips over I2C or SPI. This
326  * @read_reg: reader function for generic GPIO
327  * @write_reg: writer function for generic GPIO
328  * @be_bits: if the generic GPIO has big endian bit order (bit 31 is representing
330  *	generic GPIO core. It is for internal housekeeping only.
331  * @reg_dat: data (in) register for generic GPIO
332  * @reg_set: output set register (out=high) for generic GPIO
333  * @reg_clr: output clear register (out=low) for generic GPIO
334  * @reg_dir_out: direction out setting register for generic GPIO
335  * @reg_dir_in: direction in setting register for generic GPIO
338  * @bgpio_bits: number of register bits used for a generic GPIO i.e.
340  * @bgpio_lock: used to lock chip->bgpio_data. Also, this is needed to keep
342  * @bgpio_data:	shadowed data register for generic GPIO to clear/set bits
344  * @bgpio_dir: shadowed direction register for generic GPIO to clear/set
345  *	direction safely. A "1" in this word means the line is set as
348  * A gpio_chip can help platforms abstract various sources of GPIOs so
349  * they can all be accessed through a common programing interface.
351  * chips, dedicated GPIO expanders, and so on.
353  * Each chip controls a number of signals, identified in method calls
354  * by "offset" values in the range 0..(@ngpio - 1).  When those signals
355  * are referenced through calls like gpio_get_value(gpio), the offset
356  * is calculated by subtracting @base from the gpio number.
429 	 * Integrates interrupt chip functionality with the GPIO chip. Can be
445 	 * If CONFIG_OF is enabled, then all GPIO controllers described in the
452 	 * Pointer to a device tree node representing this GPIO controller.
459 	 * Number of cells used to form the GPIO specifier.
466 	 * Callback to translate a device tree GPIO specifier into a chip-
467 	 * relative GPIO number and flags.
478  * for_each_requested_gpio_in_range - iterates over requested GPIOs in a given range
481  * @base:	first GPIO in the range
483  * @label:	label of current GPIO
489 /* Iterates over all requested GPIO of the given @chip */
491 	for_each_requested_gpio_in_range(chip, i, 0, chip->ngpio, label)
499  * gpiochip_add_data() - register a gpio_chip
500  * @gc: the chip to register, with gc->base initialized
501  * @data: driver-private data associated with this chip
506  * can be freely used, the gc->parent device must be registered before
507  * the gpio framework's arch_initcall().  Otherwise sysfs initialization
513  * If gc->base is negative, this requests dynamic assignment of
514  * a range of valid GPIOs.
517  * A negative errno if the chip can't be registered, such as because the
518  * gc->base is invalid or already associated with a different chip.
519  * Otherwise it returns zero as a success code.
646  * Lockdep requires that each irqchip instance be created with a
648  * boilerplate static inlines provides such a key for each
707  * struct gpio_pin_range - pin range controlled by a gpio chip
710  * @range: actual range of pins controlled by a gpio controller
772 	/* GPIO can never have been requested */  in gpiod_to_chip()
774 	return ERR_PTR(-ENODEV);  in gpiod_to_chip()
781 	return -EINVAL;  in gpiochip_lock_as_irq()