Lines Matching defs:SRC
88 #define BPF_ALU64_REG(OP, DST, SRC) \
92 .src_reg = SRC, \
96 #define BPF_ALU32_REG(OP, DST, SRC) \
100 .src_reg = SRC, \
134 #define BPF_MOV64_REG(DST, SRC) \
138 .src_reg = SRC, \
142 #define BPF_MOV32_REG(DST, SRC) \
146 .src_reg = SRC, \
186 #define BPF_LD_IMM64_RAW(DST, SRC, IMM) \
190 .src_reg = SRC, \
206 #define BPF_MOV64_RAW(TYPE, DST, SRC, IMM) \
210 .src_reg = SRC, \
214 #define BPF_MOV32_RAW(TYPE, DST, SRC, IMM) \
218 .src_reg = SRC, \
234 #define BPF_LD_IND(SIZE, SRC, IMM) \
238 .src_reg = SRC, \
244 #define BPF_LDX_MEM(SIZE, DST, SRC, OFF) \
248 .src_reg = SRC, \
254 #define BPF_STX_MEM(SIZE, DST, SRC, OFF) \
258 .src_reg = SRC, \
264 #define BPF_STX_XADD(SIZE, DST, SRC, OFF) \
268 .src_reg = SRC, \
284 #define BPF_JMP_REG(OP, DST, SRC, OFF) \
288 .src_reg = SRC, \
304 #define BPF_JMP32_REG(OP, DST, SRC, OFF) \
308 .src_reg = SRC, \
357 #define BPF_RAW_INSN(CODE, DST, SRC, OFF, IMM) \
361 .src_reg = SRC, \