Lines Matching full:enum

24 enum ssp_loopback {
30 * enum ssp_interface - interfaces allowed for this SSP Controller
39 enum ssp_interface {
47 * enum ssp_hierarchy - whether SSP is configured as Master or Slave
49 enum ssp_hierarchy {
55 * enum ssp_clock_params - clock parameters, to set SSP clock at a
64 * enum ssp_rx_endian - endianess of Rx FIFO Data
67 enum ssp_rx_endian {
73 * enum ssp_tx_endian - endianess of Tx FIFO Data
75 enum ssp_tx_endian {
81 * enum ssp_data_size - number of bits in one data element
83 enum ssp_data_size {
97 * enum ssp_mode - SSP mode of operation (Communication modes)
99 enum ssp_mode {
106 * enum ssp_rx_level_trig - receive FIFO watermark level which triggers
109 enum ssp_rx_level_trig {
121 enum ssp_tx_level_trig {
130 * enum SPI Clock Phase - clock phase (Motorola SPI interface only)
134 enum ssp_spi_clk_phase {
140 * enum SPI Clock Polarity - clock polarity (Motorola SPI interface only)
144 enum ssp_spi_clk_pol {
152 enum ssp_microwire_ctrl_len {
166 * enum Microwire Wait State
170 enum ssp_microwire_wait_state {
176 * enum ssp_duplex - whether Full/Half Duplex on microwire, only
183 enum ssp_duplex {
189 * enum ssp_clkdelay - an optional clock delay on the feedback clock
202 enum ssp_clkdelay {
216 enum ssp_chip_select {
272 enum ssp_interface iface;
273 enum ssp_hierarchy hierarchy;
276 enum ssp_mode com_mode;
277 enum ssp_rx_level_trig rx_lev_trig;
278 enum ssp_tx_level_trig tx_lev_trig;
279 enum ssp_microwire_ctrl_len ctrl_len;
280 enum ssp_microwire_wait_state wait_state;
281 enum ssp_duplex duplex;
282 enum ssp_clkdelay clkdelay;