Lines Matching full:36
40 #define CLK_MOUT_SCLK_MMC0_C 36
241 #define CLK_MOUT_SCLK_DECON_TV_ECLK_A 36
437 #define CLK_SCLK_UART0 36
509 #define CLK_SCLK_SECKEY 36
554 #define CLK_PHYCLK_UFS_RX1_SYMBOL_PHY 36
692 #define CLK_DIV_PCLK_DISP 36
814 #define CLK_PCLK_TIMER 36
979 #define CLK_PCLK_DBG_CSSYS 36
1107 #define CLK_ACLK_SMMU_SCALERC 36
1190 #define CLK_DIV_ACLK_LITE_B 36
1329 #define CLK_ACLK_ASYNCAXIS_CA5 36
1413 #define IMEM_NR_CLK 36