Lines Matching full:ehci
9 /* definitions used for the EHCI driver */
92 * ehci-timer.c) in parallel with this list.
266 static inline struct usb_hcd *ehci_to_hcd(struct ehci_hcd *ehci) in ehci_to_hcd() argument
268 return container_of((void *) ehci, struct usb_hcd, hcd_priv); in ehci_to_hcd()
277 #define QTD_NEXT(ehci, dma) cpu_to_hc32(ehci, (u32)dma) argument
280 * EHCI Specification 0.95 Section 3.5
288 /* first part defined by EHCI spec */
289 __hc32 hw_next; /* see EHCI 3.5.1 */
290 __hc32 hw_alt_next; /* see EHCI 3.5.2 */
291 __hc32 hw_token; /* see EHCI 3.5.3 */
306 #define ACTIVE_BIT(ehci) cpu_to_hc32(ehci, QTD_STS_ACTIVE) argument
307 #define HALT_BIT(ehci) cpu_to_hc32(ehci, QTD_STS_HALT) argument
308 #define STATUS_BIT(ehci) cpu_to_hc32(ehci, QTD_STS_STS) argument
310 __hc32 hw_buf[5]; /* see EHCI 3.5.4 */
321 #define QTD_MASK(ehci) cpu_to_hc32(ehci, ~0x1f) argument
328 #define Q_NEXT_TYPE(ehci, dma) ((dma) & cpu_to_hc32(ehci, 3 << 1)) argument
334 * can be used on one system with SoC EHCI controller using big-endian
335 * descriptors as well as a normal little-endian PCI EHCI controller.
344 #define QH_NEXT(ehci, dma) \ argument
345 (cpu_to_hc32(ehci, (((u32) dma) & ~0x01f) | Q_TYPE_QH))
348 #define EHCI_LIST_END(ehci) cpu_to_hc32(ehci, 1) /* "null pointer" to hw */ argument
370 * EHCI Specification 0.95 Section 3.6
377 /* first part defined by EHCI spec */
379 __hc32 hw_next; /* see EHCI 3.6.1 */
380 __hc32 hw_info1; /* see EHCI 3.6.2 */
388 __hc32 hw_info2; /* see EHCI 3.6.2 */
394 __hc32 hw_current; /* qtd list - see EHCI 3.6.4 */
468 * acts like a qh would, if EHCI had them for ISO.
503 * EHCI Specification 0.95 Section 3.3
509 /* first part defined by EHCI spec */
510 __hc32 hw_next; /* see EHCI 3.3.1 */
511 __hc32 hw_transaction[8]; /* see EHCI 3.3.2 */
519 #define ITD_ACTIVE(ehci) cpu_to_hc32(ehci, EHCI_ISOC_ACTIVE) argument
521 __hc32 hw_bufp[7]; /* see EHCI 3.3.3 */
541 * EHCI Specification 0.95 Section 3.4
547 /* first part defined by EHCI spec */
549 /* uses bit field macros above - see EHCI 0.95 Table 3-8 */
550 __hc32 hw_fullspeed_ep; /* EHCI table 3-9 */
551 __hc32 hw_uframe; /* EHCI table 3-10 */
552 __hc32 hw_results; /* EHCI table 3-11 */
564 #define SITD_ACTIVE(ehci) cpu_to_hc32(ehci, SITD_STS_ACTIVE) argument
566 __hc32 hw_buf[2]; /* EHCI table 3-12 */
567 __hc32 hw_backpointer; /* EHCI table 3-13 */
584 * EHCI Specification 0.96 Section 3.7
634 #define ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup) \ argument
635 ehci_adjust_port_wakeup_flags(ehci, true, do_wakeup)
637 #define ehci_prepare_ports_for_controller_resume(ehci) \ argument
638 ehci_adjust_port_wakeup_flags(ehci, false, false)
645 * Some EHCI controllers have a Transaction Translator built into the
655 ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc) in ehci_port_speed() argument
657 if (ehci_is_TDI(ehci)) { in ehci_port_speed()
658 switch ((portsc >> (ehci->has_hostpc ? 25 : 26)) & 3) { in ehci_port_speed()
675 #define ehci_port_speed(ehci, portsc) USB_PORT_STAT_HIGH_SPEED argument
738 static inline unsigned int ehci_readl(const struct ehci_hcd *ehci, in ehci_readl() argument
742 return ehci_big_endian_mmio(ehci) ? in ehci_readl()
762 static inline void ehci_writel(const struct ehci_hcd *ehci, in ehci_writel() argument
766 ehci_big_endian_mmio(ehci) ? in ehci_writel()
770 if (ehci->imx28_write_fix) in ehci_writel()
783 static inline void set_ohci_hcfs(struct ehci_hcd *ehci, int operational) in set_ohci_hcfs() argument
787 hc_control = (readl_be(ehci->ohci_hcctrl_reg) & ~OHCI_CTRL_HCFS); in set_ohci_hcfs()
793 writel_be(hc_control, ehci->ohci_hcctrl_reg); in set_ohci_hcfs()
794 (void) readl_be(ehci->ohci_hcctrl_reg); in set_ohci_hcfs()
797 static inline void set_ohci_hcfs(struct ehci_hcd *ehci, int operational) in set_ohci_hcfs() argument
804 * The AMCC 440EPx not only implements its EHCI registers in big-endian
807 * EHCI controllers accessed through PCI work normally (little-endian
813 /* cpu to ehci */
814 static inline __hc32 cpu_to_hc32(const struct ehci_hcd *ehci, const u32 x) in cpu_to_hc32() argument
816 return ehci_big_endian_desc(ehci) in cpu_to_hc32()
821 /* ehci to cpu */
822 static inline u32 hc32_to_cpu(const struct ehci_hcd *ehci, const __hc32 x) in hc32_to_cpu() argument
824 return ehci_big_endian_desc(ehci) in hc32_to_cpu()
829 static inline u32 hc32_to_cpup(const struct ehci_hcd *ehci, const __hc32 *x) in hc32_to_cpup() argument
831 return ehci_big_endian_desc(ehci) in hc32_to_cpup()
838 /* cpu to ehci */
839 static inline __hc32 cpu_to_hc32(const struct ehci_hcd *ehci, const u32 x) in cpu_to_hc32() argument
844 /* ehci to cpu */
845 static inline u32 hc32_to_cpu(const struct ehci_hcd *ehci, const __hc32 x) in hc32_to_cpu() argument
850 static inline u32 hc32_to_cpup(const struct ehci_hcd *ehci, const __hc32 *x) in hc32_to_cpup() argument
859 #define ehci_dbg(ehci, fmt, args...) \ argument
860 dev_dbg(ehci_to_hcd(ehci)->self.controller, fmt, ## args)
861 #define ehci_err(ehci, fmt, args...) \ argument
862 dev_err(ehci_to_hcd(ehci)->self.controller, fmt, ## args)
863 #define ehci_info(ehci, fmt, args...) \ argument
864 dev_info(ehci_to_hcd(ehci)->self.controller, fmt, ## args)
865 #define ehci_warn(ehci, fmt, args...) \ argument
866 dev_warn(ehci_to_hcd(ehci)->self.controller, fmt, ## args)
870 /* Declarations of things exported for use by ehci platform drivers */
882 extern int ehci_handshake(struct ehci_hcd *ehci, void __iomem *ptr,
884 extern int ehci_reset(struct ehci_hcd *ehci);
888 extern void ehci_adjust_port_wakeup_flags(struct ehci_hcd *ehci,