Lines Matching +full:maximum +full:- +full:speed
1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
3 * core.h - DesignWare HS OTG Controller common declarations
5 * Copyright (C) 2004-2013 Synopsys, Inc.
16 * 3. The names of the above-listed copyright holders may not be used
50 * - no_printk: Disable tracing
51 * - pr_info: Print this info to the console
52 * - trace_printk: Print this info to trace buffer (good for verbose logging)
61 dev_name(hsotg->dev), ##__VA_ARGS__)
66 dev_name(hsotg->dev), ##__VA_ARGS__)
68 /* Maximum number of Endpoints/HostChannels */
71 /* dwc2-hsotg declarations */
103 * struct dwc2_hsotg_ep - driver endpoint definition.
116 * @mc: Multi Count - number of transactions per microframe
122 * @send_zlp: Set if we need to send a zero-length packet.
146 * as in shared-fifo mode periodic in acts like a single-frame packet
187 * struct dwc2_hsotg_req - data transfer request
202 if ((_hs)->gadget.speed != USB_SPEED_UNKNOWN && \
203 (_hs)->driver && (_hs)->driver->_entry) { \
204 spin_unlock(&_hs->lock); \
205 (_hs)->driver->_entry(&(_hs)->gadget); \
206 spin_lock(&_hs->lock); \
234 * struct dwc2_core_params - Parameters for configuring the core
237 * 0 - HNP and SRP capable
238 * 1 - SRP Only capable
239 * 2 - No HNP/SRP capable (always available)
244 * 0 - Slave (always available)
245 * 1 - DMA (default, if available)
250 * 0 - Address DMA
251 * 1 - Descriptor DMA (default, if available)
254 * the data FIFOs in Full Speed mode only. The driver
257 * 0 - Address DMA
258 * 1 - Descriptor DMA in FS (default, if available)
259 * @speed: Specifies the maximum speed of operation in host and
260 * device mode. The actual speed depends on the speed of
262 * 0 - High Speed
264 * 1 - Full Speed
265 * (default when phy_type is Full Speed)
266 * @enable_dynamic_fifo: 0 - Use coreConsultant-specified FIFO size parameters
267 * 1 - Allow dynamic FIFO sizing (default, if available)
268 * @en_multiple_tx_fifo: Specifies whether dedicated per-endpoint transmit FIFOs
269 * are enabled for non-periodic IN endpoints in device
271 * @host_rx_fifo_size: Number of 4-byte words in the Rx FIFO in host mode when
274 * Actual maximum value is autodetected and also
276 * @host_nperio_tx_fifo_size: Number of 4-byte words in the non-periodic Tx FIFO
279 * Actual maximum value is autodetected and also
281 * @host_perio_tx_fifo_size: Number of 4-byte words in the periodic Tx FIFO in
284 * Actual maximum value is autodetected and also
286 * @max_transfer_size: The maximum transfer size supported, in bytes
288 * Actual maximum value is autodetected and also
290 * @max_packet_count: The maximum number of packets in a transfer
292 * Actual maximum value is autodetected and also
296 * Actual maximum value is autodetected and also
300 * 0 - Full Speed Phy
301 * 1 - UTMI+ Phy
302 * 2 - ULPI Phy
316 * 0 - single data rate ULPI interface with 8 bit wide
318 * 1 - double data rate ULPI interface with 4 bit wide
322 * 0 - Internal supply (default)
323 * 1 - External supply
325 * speed PHY. This parameter is only applicable if phy_type
327 * 0 - No (default)
328 * 1 - Yes
330 * 0 - Disable (default)
331 * 1 - Enable
333 * 0 - No
334 * 1 - Yes
336 * 0 - No (default)
337 * 1 - Yes
339 * when attached to a Full Speed or Low Speed device in
341 * 0 - Don't support low power mode (default)
342 * 1 - Support low power mode
344 * when connected to a Low Speed device in host
347 * 0 - 48 MHz
349 * 1 - 6 MHz
350 * (default when phy_type is Full Speed)
352 * 0 - Allow overcurrent condition to get detected
353 * 1 - Disable overcurrent condtion to get detected
355 * 0 - No (default)
356 * 1 - Yes
358 * 0 - No (default for core < 2.92a)
359 * 1 - Yes (default for core >= 2.92a)
362 * -1 - GAHBCFG value will be set to 0x06
364 * all others - GAHBCFG value will be overridden with
374 * 0 - No (default)
375 * 1 - Yes
380 * 0 - No (default)
381 * 1 - Partial power down
382 * 2 - Hibernation
384 * 0 - No
385 * 1 - Yes
387 * 0 - No
388 * 1 - Yes
390 * 0 - No
391 * 1 - Yes
393 * 0 - No
394 * 1 - Yes
398 * 62500 - 16MHz
399 * 58823 - 17MHz
400 * 52083 - 19.2MHz
401 * 50000 - 20MHz
402 * 41666 - 24MHz
403 * 33333 - 30MHz (default)
404 * 25000 - 40MHz
412 * 0 - Deactivate the transceiver (default)
413 * 1 - Activate the transceiver
416 * 0 - Deactivate the external level detection (default)
417 * 1 - Activate the external level detection
421 * DWORDS from 16-32768 (default: 2048 if
423 * @g_np_tx_fifo_size: The non-periodic tx fifo size for the device in
424 * DWORDS from 16-32768 (default: 1024 if
430 * 16-32768 (default: 256, 256, 256, 256, 768,
432 * @change_speed_quirk: Change speed configuration to DWC2_SPEED_PARAM_FULL
433 * while full&low speed device connect. And change speed
435 * 0 - No (default)
436 * 1 - Yes
438 * 0 - No
439 * 1 - Yes
443 * value of -1 (or any other out of range value) for any parameter means
458 u8 speed; member
522 * struct dwc2_hw_params - Autodetected parameters.
526 * supported or maximum value that can be configured in the
532 * 0 - HNP- and SRP-Capable OTG (Host & Device)
533 * 1 - SRP-Capable OTG (Host & Device)
534 * 2 - Non-HNP and Non-SRP Capable OTG (Host & Device)
535 * 3 - SRP-Capable Device
536 * 4 - Non-OTG Device
537 * 5 - SRP-Capable Host
538 * 6 - Non-OTG Host
540 * 0 - Slave only
541 * 1 - External DMA
542 * 2 - Internal DMA
544 * the worst-case scenario of Rx followed by Rx
547 * 0 - Don't support
548 * 1 - Support
561 * Non-Periodic Request Queue Depth
563 * @hs_phy_type: High-speed PHY interface type
564 * 0 - High-speed interface not supported
565 * 1 - UTMI+
566 * 2 - ULPI
567 * 3 - UTMI+ and ULPI
568 * @fs_phy_type: Full-speed PHY interface type
569 * 0 - Full speed interface not supported
570 * 1 - Dedicated full speed interface
571 * 2 - FS pins shared with UTMI+ pins
572 * 3 - FS pins shared with ULPI pins
576 * 0 - 8 bits
577 * 1 - 16 bits
578 * 2 - 8 or 16 bits
581 * @g_tx_fifo_size: Power-on values of TxFIFO sizes
586 * 0 - Address DMA
587 * 1 - Descriptor DMA (default, if available)
588 * @enable_dynamic_fifo: 0 - Use coreConsultant-specified FIFO size parameters
589 * 1 - Allow dynamic FIFO sizing (default, if available)
590 * @en_multiple_tx_fifo: Specifies whether dedicated per-endpoint transmit FIFOs
591 * are enabled for non-periodic IN endpoints in device
593 * @host_nperio_tx_fifo_size: Number of 4-byte words in the non-periodic Tx FIFO
596 * Actual maximum value is autodetected and also
598 * @host_perio_tx_fifo_size: Number of 4-byte words in the periodic Tx FIFO in
601 * Actual maximum value is autodetected and also
603 * @max_transfer_size: The maximum transfer size supported, in bytes
605 * Actual maximum value is autodetected and also
607 * @max_packet_count: The maximum number of packets in a transfer
609 * Actual maximum value is autodetected and also
613 * Actual maximum value is autodetected and also
615 * @dev_nperio_tx_fifo_size: Number of 4-byte words in the non-periodic Tx FIFO
618 * Actual maximum value is autodetected and also
621 * speed PHY. This parameter is only applicable if phy_type
623 * 0 - No (default)
624 * 1 - Yes
626 * 0 - Disable
627 * 1 - Enable
629 * 0 - Disable
630 * 1 - Enable
631 * @rx_fifo_size: Number of 4-byte words in the Rx FIFO when dynamic
633 * Actual maximum value is autodetected and also
637 * 0 - Disable
638 * 1 - Enable
679 * struct dwc2_gregs_backup - Holds global registers state before
713 * struct dwc2_dregs_backup - Holds device registers state before
746 * struct dwc2_hregs_backup - Holds host registers state before
767 * Constants related to high speed periodic scheduling
782 * We schedule 100us per uframe or 80% of 125us (the maximum amount you're
790 * - DWC2_HS_SCHEDULE_UFRAMES must even divide 0x4000 (HFNUM_MAX_FRNUM + 1)
791 * - DWC2_HS_SCHEDULE_UFRAMES must be 8 times DWC2_LS_SCHEDULE_FRAMES (probably
803 * Constants related to low speed scheduling
805 * For high speed we schedule every 1us. For low speed that's a bit overkill,
810 * Our low speed schedule can be as short as 1 frame or could be longer. When
813 * every 2048 frames will get time reserved in every frame. Our low speed
817 * Note: one other advantage of a short low speed schedule is that if we mess
825 * - DWC2_US_PER_SLICE must evenly divide DWC2_LS_PERIODIC_US_PER_FRAME.
845 * struct dwc2_hsotg - Holds the state of the driver, including the non-periodic
860 * - USB_DR_MODE_PERIPHERAL
861 * - USB_DR_MODE_HOST
862 * - USB_DR_MODE_OTG
864 * @hcd_enabled: Host mode sub-driver initialization indicator.
865 * @gadget_enabled: Peripheral mode sub-driver initialization indicator.
866 * @ll_hw_enabled: Status of low-level hardware resources.
887 * @queuing_high_bandwidth: True if multiple packets of a high-bandwidth
916 * @non_periodic_sched_inactive: Inactive QHs in the non-periodic schedule.
919 * @non_periodic_sched_active: Active QHs in the non-periodic schedule.
923 * non-periodic schedule
924 * @non_periodic_sched_waiting: Waiting QHs in the non-periodic schedule.
964 * host is in high speed mode; low speed schedules are
973 * host channel is available for non-periodic transactions.
974 * @non_periodic_channels: Number of host channels assigned to non-periodic
985 * @start_work: Delayed work for handling host A-cable connection
994 * @unaligned_cache: Kmem cache for DMA mode to handle non-aligned buf
999 * @dedicated_fifos: Set if the hardware has dedicated IN-EP fifos.
1009 * @remote_wakeup_allowed: True if device is allowed to wake-up host by
1010 * remote-wakeup signalling
1035 * @dumped_frame_num_array: 1 - if missed SOFs frame numbers dumbed
1036 * 0 - if missed SOFs frame numbers not dumbed
1220 val = readl(hsotg->regs + offset); in dwc2_readl()
1221 if (hsotg->needs_byte_swap) in dwc2_readl()
1229 if (hsotg->needs_byte_swap) in dwc2_writel()
1230 writel(swab32(value), hsotg->regs + offset); in dwc2_writel()
1232 writel(value, hsotg->regs + offset); in dwc2_writel()
1235 pr_info("info:: wrote %08x to %p\n", value, hsotg->regs + offset); in dwc2_writel()
1248 } while (--count); in dwc2_readl_rep()
1260 } while (--count); in dwc2_writel_rep()
1285 return (hsotg->hw_params.snpsid & 0xfff00000) == 0x55300000; in dwc2_is_iot()
1290 return (hsotg->hw_params.snpsid & 0xffff0000) == 0x55310000; in dwc2_is_fs_iot()
1295 return (hsotg->hw_params.snpsid & 0xffff0000) == 0x55320000; in dwc2_is_hs_iot()
1359 * These functions can be used before the internal hsotg->hw_params
1406 #define dwc2_is_device_connected(hsotg) (hsotg->connected)
1469 { schedule_work(&hsotg->phy_reset_work); } in dwc2_host_schedule_phy_reset()