Lines Matching +full:1 +full:ms

20 					 * TA_VBUS_RISE <= 100ms, section 4.4
21 					 * Table 4-1: Electrical Characteristics
31 					 * and 30000 ms, section 5.5, Table 5-1
34 #define TA_AIDL_BDIS         (5000)	/* a_suspend min 200 ms, section 5.2.1
35 					 * TA_AIDL_BDIS: section 5.5, Table 5-1
38 #define TA_BIDL_ADIS         (500)	/* TA_BIDL_ADIS: section 5.2.1
39 					 * 500ms is used for B switch to host
48 #define TB_DATA_PLS          (10)	/* b_srp_init,continue 5~10ms
56 #define TB_ASE0_BRST         (155)	/* minimum 155 ms, section:5.3.1 */
58 #define TB_SE0_SRP           (1000)	/* b_idle,minimum 1s, section:5.1.2 */
62 #define TB_AIDL_BDIS         (20)	/* 4ms ~ 150ms, section 5.2.1 */